Master student @ Tsinghua University
Computer Science & Technology
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Tsinghua University
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20:57
(UTC +08:00)
Pinned Loading
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XiangShan
XiangShan PublicForked from OpenXiangShan/XiangShan
Open-source high-performance RISC-V processor
Scala
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MipsGreatAgain-Soc
MipsGreatAgain-Soc PublicForked from liu-hz18/MipsGreatAgain-Soc
A light-weighted synthesizable 9-stage-pipelined MIPS processor with branch prediction and CP1(FPU) support.
Verilog
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