x64: improve multiplication lowering #2889
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Since the lowering of `imul` complicated the other ALU operations it was matched with and since future commits will alter the multiplication lowering further, this change moves the `imul` lowering to its own match block.
This adds the machinery to encode the VPMULLQ instruction which is available in AVX512VL and AVX512DQ. When these feature sets are available, we use this instruction instead of a lengthy 12-instruction sequence.
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Since the lowering of
imulcomplicated the other ALU operations it wasmatched with and since future commits will alter the multiplication
lowering further, this change moves the
imullowering to its own matchblock. Then, it improves the filetests and uses
VPMULLQas a loweringfor
imul.i64x2when the instruction is available.