Incorrect detailed disassembly of AArch64 ldr and ldapr instructions

[stevielavern]

There are a few bugs in the detailed disassembly of AArch64 load instructions:

1. ldr* instructions report operand 1 with type WRITE instead of READ:

$ cstool -d arm64 '41 00 40 F9'
 0  41 00 40 f9  ldr	x1, [x2]
	ID: 393 (ldr)
	op_count: 2
		operands[0].type: REG = x1
		operands[0].access: WRITE
		operands[1].type: MEM
			operands[1].mem.base: REG = x2
		operands[1].access: WRITE.          <---- should be READ
	Registers read: x2
	Registers modified: x1

2. ldapr instructions lack access information both on registers and operands:

$ cstool -d arm64 '88 c2 bf f8'
 0  88 c2 bf f8  ldapr	x8, [x20]
	ID: 329 (ldapr)
	op_count: 2
		operands[0].type: REG = x8
		operands[1].type: MEM
			operands[1].mem.base: REG = x20
	Registers read: x20

[stevielavern]

The PR includes a unit test for both bugs, but it only fixes the 2nd one because I don't yet know how to fix the 1st one (ldr). Any help is appreciated.

[kabeor]

1st fixed in #1845