Merge pull request #143 from mchirindo/master

Updating the axi4lite documentation
casper-astro · Aug 17, 2021 · 279dce9 · 279dce9
2 parents 980a5fb + e8a4ace
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diff --git a/docs/_static/img/raw_AXI_device_simulink_block.png b/docs/_static/img/raw_AXI_device_simulink_block.png
diff --git a/docs/_static/img/raw_axi_register_simulink_block.png b/docs/_static/img/raw_axi_register_simulink_block.png
diff --git a/docs/axi4lite_documentation.md b/docs/axi4lite_documentation.md
@@ -168,7 +168,7 @@ The raw AXI4-Lite implementation in the toolflow follows the philosophy illustra
 ####   i. Simulink Block
 The developer needs to create a raw AXI simulink block based on the tutorial found at https://casper-toolflow.readthedocs.io/projects/tutorials/en/latest/tutorials/snap/tut_gpio_bidir.html?highlight=gpio. However, for testing purposes only, one may want to use the software register found in .../mlib_devel/xps_library/xps_models. In this case, we change the tag of the sw_reg block to something else that represents the raw AXI device eg raw_axi as follows:
 
-![raw_AXI_device_simulink_block.png](../../mlib_devel/docs/_static/img/raw_AXI_device_simulink_block.png)
+![raw_AXI_device_simulink_block.png](_static/img/raw_axi_register_simulink_block.png)
 
 ####   ii Yellow Block Python Script (raw_axi.py)
 It is important to name the yellow block python script and yellow_block class as the simulink block tag. The yellow block script code is similar to that of the software register except that the code under the 'From Processor' is replaced by the code block below. Note that the code has only been tested for the 'From Processor' configured software register, that has 'rw' permissions.