Merge pull request #168 from ska-sa/au50

Removing those weird assign statements
casper-astro · Sep 2, 2022 · ab26d62 · ab26d62
2 parents b092f4b + cb98882
commit ab26d62
Showing 1 changed file with 0 additions and 5 deletions.
diff --git a/jasper_library/yellow_blocks/bram.py b/jasper_library/yellow_blocks/bram.py
@@ -39,11 +39,6 @@ def modify_top(self,top):
             top.add_signal(self.fullname + '_data_in', width=self.data_width)
             top.add_signal(self.fullname + '_data_out', width=self.data_width)
             top.add_signal(self.fullname + '_we', width=1)
-            # Weird assignments. TODO: figure out what on earth the naming convention is with AXI generation.
-            top.assign_signal(self.fullname + '_addr',     self.unique_name + '_' + self.unique_name + '_addr')
-            top.assign_signal(self.fullname + '_data_in',  self.unique_name + '_' + self.unique_name + '_data_in')
-            top.assign_signal(self.fullname + '_data_out', self.unique_name + '_' + self.unique_name + '_data_out')
-            top.assign_signal(self.fullname + '_we',       self.unique_name + '_' + self.unique_name + '_we')
 
         else:
             module = 'wb_bram'