common: Leverage a better CRC32C implementation

[tj90241]

ISA-L provides a few different CRC32C implementations, of
which Ceph has only ever linked against one
(crc32_iscsi_00).

The second implementation of CRC32C provided by ISA-L
(crc32_iscsi_01) improves upon the first as it is used by
Ceph in a couple of ways:

1. crc32_iscsi_01 explicitly handles and checks for < 8
   byte buffers and computes the CRC32C value using the
   hardware-accelerated CRC32 instruction. In comparison,
   crc32_iscsi_00 prefetches too far in cases of small
   buffers, requiring the Ceph code to explicitly check
   and handle this case differently in software. This
   software-fallback implementation of CRC32 also comes
   with a different set of LUTs (look up tables) and is
   less efficient as it does not make use of the CRC32
   instruction.

2. crc32_iscsi_00 makes use of large LUTs (look up
   tables) to effectively perform the modular reduction
   required to produce the CRC32C value. In constrast,
   crc32_iscsi_01 uses the PCLMUL instruction set to
   perform reductions 128-bits at a time with smaller
   LUTs, resulting in greater throughput and less data
   cache pollution.

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[tj90241]

cc: @markhpc @Matt1360

[tj90241]

Aside -- I'm not sure the check for overread in crc32_iscsi_00 applies any more either. An ISA-L submodule bump was done here:

commit 441aa3672fe886aed07e08ab944be68fda784d15
Author: Hang Li <lihang48@huawei.com>
Date:   Tue Mar 10 09:37:45 2020 +0800

    Bump the version of isa-l to v2.29.0

At which point this change was swept up: intel/isa-l@105eeb9

[Matt1360]

Nice, thanks!

[tj90241]

jenkins retest this please

[markhpc]

LGTM, though I don't know if there are any corner cases we should watch out for. Probably good to get this in testing early in the release cycle.

[athanatos]

@tj90241 Does this get executed in a normal suite run? If so, lgtm.

[tj90241]

Hi @athanatos - any kind of cluster or use case will make extremely heavy use of this change as long as the hosts under QA have PCLMUL support (check grep -I pclmul /proc/cpuinfo).. CRC32, unless disabled in ceph.conf, is heavily used by the msgr component by default and typically CRC32C is one of the hottest symbols in a execution profile of Ceph OSDs.

[athanatos]

[sjust@smithi105 ~]$ grep -I pclmul /proc/cpuinfo
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 pti intel_ppin tpr_shadow flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a rdseed adx smap intel_pt xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts vnmi

I see pclmulqdq in cpuinfo -- good enough?

[tj90241]

Technically you also need sse4_2 (it was a requirement for the previous accelerated CRC32C function as well), but you have that as well. With the above, I can say with certainty that any kind of Ceph cluster which has CRC enabled (by default) will be using this new function heavily when its doing I/O.

If you wanted to be extra pedantic, you can also validate the symbol is hit at runtime with e.g. sudo perf top -p $( pidof ceph-osd | tr ' ' '\n' | head -n1 ) - you will likely see crc32_iscsi_01 somewhere at the top of the hit list when the cluster is doing lots of I/O. Without this commit, you should see crc32_iscsi_00 in its place.

(you could also set a breakpoint in gdb on those symbols)

[athanatos]

@tj90241 I just want to ensure that we're getting test coverage with our normal integration tests.