AXI to AHB converter tests

[mczyz-antmicro]

PR description

This PR adds PyUVM tests of the AXI to AHB converter, located in design/lib/axi_to_ahb.sv. The tests are:

• test_axi_read_channel, which performs 32 randomized Read Transactions
• test_axi_write_channel, which performs 32 randomized Write Transactions
• test_axi, which performs 32 randomly interleaved Read and Write Transactions

Tests uncover an issue with the AXI to AHB converter, which is described in detail in the header of the test_axi.py file. Until the RTL is fixed, the tests are marked as expected to fail.

Test execution

Tests are added to the Nox configuration file in the directory verification/block/lib_axi_to_ahb/ and can be run with command:

nox -s lib_axi_to_ahb_verify

Tests are added to the GH Actions in the Microarchitectural tests tests-uarch.yml configuration file.

Tests operation

In high-level terms, verification of the AXI to AHB Converter is performed by issuing a Read or Write Transaction on the AXI Interface, responding to the transaction on the AHB bus, and then comparing if data, address and type of operation were properly decoded on both interfaces. AXI interface defines 5 channels of communication: Write Request, Write, Write Response, Read Request, Read Response. Handlers for the 3 Write channels are implemented in the AXIWriteChannelAgent, while handlers for the 2 Read Channels are implemented in the AXIReadChannelAgent. A third agent is implemented to handle the AHB interface AHBLiteAgent.

The DUT implements a subset of the specification, meaning that the AHB interface can only produce non-sequential transfers. As a result:

• each AXI transfer beginning is also its end
• burst transactions are not performed (ahb_hburst is tied to 0)
• locked transfers (AHB) are not performed (hmastlock is tied to 0)

The tests perform 64b transactions, which could be later expanded to also cover {8b, 16b,32b} transfers. Transfers addresses are aligned to byte granularity. Data and addresses of each transfer are randomized.

[github-actions]

Links to coverage and verification reports for this PR (#126) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/

[github-actions]

Links to coverage and verification reports for this PR (#126) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/