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support for Riviera-PRO #6
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@@ -70,6 +70,10 @@ targets: | |||
generate : [intercon, swerv_default_config, version] | |||
parameters : [SIMPRINT=true, jtag_vpi_enable, ram_init_file=hello.vh, rom_init_file, signature, timeout, vcd] | |||
tools: | |||
rivierapro: | |||
vlog_options : |
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Instead of having to specify compilation_mode on the command-line, it's better to just set compilation_mode : common
in the rivierapro tool options
To build and run on Riviera-Pro simulator | ||
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fusesoc run --target=sim --tool=rivierapro swervolf --compilation_mode=common | ||
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As I mentioned in the other commit, set compilation mode directly in the core file instead of having to set it on the command-line
Thanks for this. I have addressed the PRs for Edalize and axi_node now. For SweRV we can solve this with a FuseSoC patch until the fix is upstreamed. Will get back when I have fixed that |
ok, I pulled in the SweRV fix as a patch in the core file If you can verify that it works and change this PR to set compilation_mode directly in the core file, I am happy to pull it in |
cores/swerv.core
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@@ -100,6 +100,8 @@ targets: | |||
rivierapro: | |||
vlog_options : | |||
- config/common_defines.vh | |||
compilation_mode: | |||
- common |
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compilation mode is defined as string, not a list, so this should be compilation_mode : common
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ok, sorry my bad
Fantastic! Squashed and merged. Many thanks for your support |
Hey!
This is pull request with support for Riviera-PRO. To fully work need to: