pll: fix the range of DI and DADDR pins #17
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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@rw1nkler FYI |
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Signed-off-by: Alessandro Comodi acomodi@antmicro.com
This PR fixes PLL inputs that are not added to the site. This causes conflicts in the constant nets as those pins get to be unrouted.