fasm2bels: add the remaining vpr-fasm2bels tests

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
chipsalliance · Jul 30, 2020 · 02bce07 · 02bce07
1 parent 48efb01
commit 02bce07
Show file tree

Hide file tree

Showing 6 changed files with 33 additions and 0 deletions.
diff --git a/project/ibex.json b/project/ibex.json
@@ -26,10 +26,16 @@
     "data": [
         "src/ibex/led.vmem"
     ],
+    "clocks": {
+        "IO_CLK": 10.0
+    },
     "toolchains": {
         "vpr": {
             "arty": ["arty.pcf", "arty.sdc", "arty-vpr.xdc"]
         },
+        "vpr-fasm2bels": {
+            "arty": ["arty.pcf", "arty.sdc", "arty-vpr.xdc"]
+        },
         "vivado": {
             "arty": ["arty-vivado.xdc"]
         },

diff --git a/project/murax.json b/project/murax.json
@@ -11,6 +11,9 @@
     ],
     "top": "toplevel",
     "name": "murax",
+    "clocks": {
+        "io_mainClk": 10.0
+    },
     "toolchains": {
         "vpr": {
             "basys3": ["basys3.pcf", "basys3.sdc"]

diff --git a/project/picosoc-simpleuart.json b/project/picosoc-simpleuart.json
@@ -5,6 +5,9 @@
     ],
     "top": "top",
     "name": "picosoc-simpleuart-wrap",
+    "clocks": {
+        "clk": 10.0
+    },
     "toolchains": {
         "vivado": {
             "basys3": ["basys3.xdc"]
@@ -14,6 +17,9 @@
         },
         "vpr": {
             "basys3": ["basys3.pcf"]
+        },
+        "vpr-fasm2bels": {
+            "basys3": ["basys3.pcf"]
         }
     }
 }

diff --git a/project/picosoc-spimemio.json b/project/picosoc-spimemio.json
@@ -5,6 +5,9 @@
     ],
     "top": "top",
     "name": "picosoc-spimemio-wrap",
+    "clocks": {
+        "clk": 10.0
+    },
     "toolchains": {
         "vivado": {
             "basys3": ["basys3.xdc"]
@@ -14,6 +17,9 @@
         },
         "vpr": {
             "basys3": ["basys3.pcf"]
+        },
+        "vpr-fasm2bels": {
+            "basys3": ["basys3.pcf"]
         }
     }
 }

diff --git a/project/picosoc.json b/project/picosoc.json
@@ -9,10 +9,16 @@
     ],
     "top": "top",
     "name": "picosoc-wrap",
+    "clocks": {
+        "clk": 10.0
+    },
     "toolchains": {
         "vpr": {
             "basys3": ["basys3.pcf", "basys3.sdc"]
         },
+        "vpr-fasm2bels": {
+            "basys3": ["basys3.pcf", "basys3.sdc"]
+        },
         "nextpnr-xilinx": {
             "basys3": ["basys3-nextpnr.xdc"]
         },

diff --git a/project/vexriscv.json b/project/vexriscv.json
@@ -5,6 +5,9 @@
     ],
     "top": "top",
     "name": "vexriscv-verilog",
+    "clocks": {
+        "clk": 10.0
+    },
     "toolchains": {
         "vivado": {
             "basys3": ["basys3.xdc"]
@@ -14,6 +17,9 @@
         },
         "vpr": {
             "basys3": ["basys3.pcf"]
+        },
+        "vpr-fasm2bels": {
+            "basys3": ["basys3.pcf"]
         }
     }
 }