Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

add netv2 default hardware design #87

Open
wants to merge 1 commit into
base: main
Choose a base branch
from
Open

add netv2 default hardware design #87

wants to merge 1 commit into from

Conversation

wtatarski
Copy link
Contributor

Fixes #46

@wtatarski
Copy link
Contributor Author

Failure in tests is related to yosys version.
We have to wait for yosys update in conda packages -> SymbiFlow/yosys/pull/74

@mithro
Copy link
Collaborator

mithro commented Oct 28, 2020

@wtatarski - We should resurrect this pull request and get it merged.

@wtatarski wtatarski force-pushed the add-netv2-fpga branch 2 times, most recently from e364d03 to 5e0e3b6 Compare November 6, 2020 17:02
@tmichalak tmichalak force-pushed the add-netv2-fpga branch 2 times, most recently from 3ae2998 to 3f78a7d Compare September 29, 2021 15:09
@tmichalak
Add netv2 board and default hardware design
a71e930 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers
No reviews
Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.

Add NeTV2 default hardware design as example
4 participants
@wtatarski @mithro @tmichalak @symbiflow-kokoro