Merge pull request #3648 from chipsalliance/tile_int_domain

Interrupts coming outwards from the Tile should cross into a toPlicDomain

src/main/scala/subsystem/Cluster.scala

@@ -63,6 +63,7 @@ class Cluster(
   def msipDomain = this
   def meipDomain = this
   def seipDomain = this
+  def toPlicDomain = this
   lazy val msipNodes = totalTileIdList.map { i => (i, IntIdentityNode()) }.to(SortedMap)
   lazy val meipNodes = totalTileIdList.map { i => (i, IntIdentityNode()) }.to(SortedMap)
   lazy val seipNodes = totalTileIdList.map { i => (i, IntIdentityNode()) }.to(SortedMap)

src/main/scala/subsystem/HasHierarchicalElements.scala

@@ -168,6 +168,7 @@ trait DefaultHierarchicalElementContextType
   val meipNodes: SortedMap[Int, IntNode]
   def seipDomain: LazyScope
   val seipNodes: SortedMap[Int, IntNode]
+  def toPlicDomain: LazyScope
   val tileToPlicNodes: SortedMap[Int, IntNode]
   val debugNodes: SortedMap[Int, IntSyncNode]
   val nmiNodes: SortedMap[Int, BundleBridgeNode[NMI]]
@@ -192,6 +193,7 @@ trait HasHierarchicalElementsRootContext
   def msipDomain = clintDomainOpt.getOrElse(this)
   def meipDomain = plicDomainOpt.getOrElse(this)
   def seipDomain = plicDomainOpt.getOrElse(this)
+  def toPlicDomain = plicDomainOpt.getOrElse(this)
 
   val msipNodes: SortedMap[Int, IntNode] = (0 until nTotalTiles).map { i =>
     (i, IntEphemeralNode())

src/main/scala/subsystem/HasTiles.scala

@@ -238,7 +238,7 @@ trait CanAttachTile {
     //    so might need to be synchronized depending on the Tile's crossing type.
     context.tileToPlicNodes.get(domain.element.tileId).foreach { node =>
       FlipRendering { implicit p => domain.element.intOutwardNode.foreach { out =>
-        node := domain.crossIntOut(crossingParams.crossingType, out)
+        context.toPlicDomain { node := domain.crossIntOut(crossingParams.crossingType, out) }
       }}
     }