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Block rams not inferred with Vivado 2015.2 with user defined types #113
Vivado 2015.2 fails to infer block ram when using the blockRamPow2 function when the type of element being stored is a user defined type. See:
Perhaps it is not the intention to allow arbitrary types to be stored in block ram, but it is allowed by the type system and I couldn't find any documentation stating that you shouldn't do that.
It is supposed to work for arbitrary types, and I'm quite sure it works with Altera's Quartus tool. Still, I want to make sure it will work with Xilinx' tools also. I know how to fix this: I have to update the code-generator to only store bitvectors (
Anyhow, as a work-around, I see two options:
I just tried with Altera Quartus Prime 15.1.0, I can go as high as a
The VHDL that I'm generating is almost an exact copy of both the Xilinx and Altera recommended VHDL for blockRam inference. I guess for blockRams with really large address spaces, you are forced to use something like Xilinx' Coregen.
I don't think there's an easy fix for the out-of-memory problem. Aside from generating Xilinx/Altera specific blockRam VHDL, instead of the current vendor-independent VHDL.