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Maintain variable names post-compilation #128
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I'm currently working on fixing blockRam inference for Xilinx Vivado. Afterwards, I'll take a look at this. |
This helps in preserving more of the original variable names. See #128 for more information.
Also make derived names more readable, so "result" instead of "topLet", or "app_arg" instead of "repANF", etc. Progress towards #128
Names cannot be preserved when: * It conflicts with a HDL keyword * It was originally a shadowed name, which, after let-expr flattening now exists in the same scope. See issue #128
I'm making progress on this. Some notes:
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Some of the name-preservation improvements are part of the 0.6.11 release of CLaSH. I'll keep this issue open, as I'm sure we can do better than what's currently implemented. |
Clash preserves most names these days; and when it doesn't you simply add a |
I would really appreciate a feature to maintain variable naming post-compilation to VHDL or Verilog like MyHDL. As of now the code that clash outputs is very difficult to read or reason about its connection to the initial Haskell.
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