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Memory files in Vivado #2269

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vmchale opened this issue Jul 3, 2022 · 1 comment
Open

Memory files in Vivado #2269

vmchale opened this issue Jul 3, 2022 · 1 comment

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@vmchale
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vmchale commented Jul 3, 2022

Vivado test fail on RomFile: #2257 (comment)

We can do something more sophisticated in our Vivado tests to get this working: #2257 (comment)

@martijnbastiaan
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GitHub doesn't allow you to link to collapsed comments :-|. Here is what I wrote:


Ah the memory file stuff is more complex than I thought:

The easy way to get memory files working with Vivado is to give them the .mem extension then add them to your project. You do this as you would for a design or simulation source using “Add Sources” then selecting “Files of type: Memory Initialization Files”. Vivado will automatically identify them as memory files and place them in the current working directory during simulation etc.

https://projectf.io/posts/initialize-memory-in-verilog/

For TCL I guess this means using read_mem (see Vivado Design Suite Tcl Command Reference Guide). In that case.. just disable them for now and make an issue. Let's discuss later with @DigitalBrains1 what to do.

Thanks for reporting the issues!

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