Merge pull request #48 from cms-l1-globaltrigger/dev_v1.25.2

merged dev_v1.25.2
cms-l1-globaltrigger · Oct 2, 2023 · 1d9c964 · 1d9c964
2 parents 4a120c8 + 40d0841
commit 1d9c964
Show file tree

Hide file tree

Showing 9 changed files with 93 additions and 66 deletions.
diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -4,6 +4,73 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](http://keepachangelog.com/)
 and this project adheres to [Semantic Versioning](http://semver.org/).
 
+## [v1.25.2] - 2023-09-29
+### Comment
+
+- mp7_ugt firmware release v1.25.2
+- changed quads 8..16 to "no_mgt" (top_decl.vhd)
+
+### Changed
+- source files:
+  - ../packages/top_decl.vhd
+  - ../payload/gtl_module_tpl.vhd
+  - ../packages/gt_mp7_core_pkg.vhd
+
+## [v1.25.1] - 2023-09-28
+### Comment
+
+- mp7_ugt firmware release v1.25.1
+- updated version numbers
+
+### Changed
+- source files:
+  - ../payload/gtl_module_tpl.vhd
+  - ../packages/gt_mp7_core_pkg.vhd
+
+## [v1.25.0] - 2023-09-18
+### Comment
+
+- mp7_ugt firmware release v1.25.0
+- changed quads 8..16, inserted with gth_5g, but without checksum and buffers
+- removed unused files "demux_lane_validation.vhd" and "reg.vhd"
+
+### Changed
+- source files:
+  - ../packages/gt_mp7_core_pkg.vhd
+  - ../packages/gt_pkg.vhd
+  - ../packages/top_decl.vhd
+- simulation file:
+  - ../sim/scripts/templates/gtl_fdl_wrapper_tpl_questa.do
+- dep file:
+  - ../cfg/uGT_algo.dep
+
+### Deleted
+- source files:
+  - ../payload/frame/demux_lane_validation.vhd
+  - ../payload/gtl/common/reg.vhd
+
+## [v1.24.0] - 2023-07-25
+### Comment
+
+- mp7_ugt firmware release v1.24.0
+- all 72 links with ZDC 5G input on links 36..71, 5G outputs on links 68-71 for loopback
+- ZDC data with 16 bits only (on 5G link)
+
+### Changed
+- source files:
+  - ../packages/gt_mp7_core_pkg.vhd
+  - ../packages/gtl_pkg.vhd
+  - ../payload/gtl_module_tpl.vhd
+  - ../payload/gtl_data_mapping.vhd
+  - ../payload/gtl/bx_pipeline.vhd
+  - ../payload/frame/output_mux.vhd
+  - ../payload/frame.vhd
+  - ../packages/top_decl.vhd
+- script files:
+  - scripts/mp7_patch.py
+- simulation file:
+  - ../sim/testbench/lhc_data_debug_util_pkg.vhd
+
 ## [v1.23.2] - 2023-09-01
 ### Comment
 

diff --git a/firmware/hdl/packages/gt_mp7_core_pkg.vhd b/firmware/hdl/packages/gt_mp7_core_pkg.vhd
@@ -3,12 +3,12 @@
 
 -- actual versions:
 -- use "FRAME_VERSION" as mp7_ugt release fw version (used for tag name).
--- mp7_ugt (=FRAME_VERSION): v1.23.2
+-- mp7_ugt (=FRAME_VERSION): v1.25.2
 
 -- use "GT_VERSION" as mp7_ugt release fw version (used for tag name).
--- gt: v1.23.2
+-- gt: v1.25.2
 -- frame: v1.4.1 (see frame.vhd)
--- gtl: v1.19.1 (see gtl_module_tpl.vhd)
+-- gtl: v1.19.4 (see gtl_module_tpl.vhd)
 -- fdl: v1.4.1 (see fdl_module.vhd)
 
 -- HB 2023-04-08: v1.22.2 - Changed in scripts/mp7_patch.py (for area_constraints.tcl).
@@ -34,6 +34,9 @@
 -- v1.15.2: Added tcl script for "manualy" bit file generation (after timing errors)
 --
 -- gtl history:
+-- HB 2023-09-29: v1.19.4: Used "no_mgt" at quads 8..16 (top_decl.vhd).
+-- HB 2023-09-28: v1.19.3: Used "no_chk" and "no_buf" at quads 8..16 (top_decl.vhd).
+-- HB 2023-09-25: v1.19.2: Removed unused files "demux_lane_validation.vhd" and "reg.vhd". Changed quads 8..16, inserted with gth_5g, but without checksum and buffers.
 -- HB 2023-09-01: v1.19.1: Added zdc_condition.vhd (was missing) and updated sim and dep file.
 -- HB 2023-08-25: v1.19.0: Used link 71 as ZDC 5G input. ZDC data structure changed (16 bits only on 5G link). Updated top_decl.vhd.
 -- HB 2023-04-15: v1.18.1: Bug fix muon index bits.
@@ -93,7 +96,7 @@ package gt_mp7_core_pkg is
 -- ==================================================================================================
 -- GT firmware version
     constant GT_MAJOR_VERSION      : integer range 0 to 255 := 1;
-    constant GT_MINOR_VERSION      : integer range 0 to 255 := 23;
+    constant GT_MINOR_VERSION      : integer range 0 to 255 := 25;
     constant GT_REV_VERSION        : integer range 0 to 255 := 2;
 	constant GT_VERSION : std_logic_vector(31 downto 0) := X"00" &
            std_logic_vector(to_unsigned(GT_MAJOR_VERSION, 8)) &
@@ -106,7 +109,7 @@ package gt_mp7_core_pkg is
 -- GTL firmware (fix part) version
     constant GTL_FW_MAJOR_VERSION      : integer range 0 to 255 := 1;
     constant GTL_FW_MINOR_VERSION      : integer range 0 to 255 := 19;
-    constant GTL_FW_REV_VERSION        : integer range 0 to 255 := 1;
+    constant GTL_FW_REV_VERSION        : integer range 0 to 255 := 4;
 -- FDL firmware version
     constant FDL_FW_MAJOR_VERSION      : integer range 0 to 255 := 1;
     constant FDL_FW_MINOR_VERSION      : integer range 0 to 255 := 4;

diff --git a/firmware/hdl/packages/gtl_pkg.vhd b/firmware/hdl/packages/gtl_pkg.vhd
@@ -2,6 +2,7 @@
 -- Package for constant and type definitions of GTL firmware in Global Trigger Upgrade system.
 
 -- Version history:
+-- HB 2023-09-13: NR_INPUT_LANES not used anymore. Added type lword_array (for output_mux.vhd and mux.vhd)
 -- HB 2023-07-28: bug fixed "type zdc_array ...".
 -- HB 2023-07-25: new ZDC data structure.
 -- HB 2023-03-06: added hadronic shower trigger bit MUS2.
@@ -66,12 +67,16 @@ use work.lhc_data_pkg.all;
 use work.math_pkg.all;
 use work.gt_mp7_core_pkg.all;
 
+use work.mp7_data_types.all;
+
 package gtl_pkg is
 
 -- Definition of input lanes
 -- NR_LANES = NR_REGIONS * 4 => 72
-constant NR_INPUT_LANES : natural := 24; -- max. input links from optical patch panel
+-- HB 2023-09-07: NR_INPUT_LANES not used anymore
+--constant NR_INPUT_LANES : natural := 24; -- max. input links from optical patch panel
 constant LINK_FRAMES : natural := 6;
+type lword_array is array (0 to LINK_FRAMES-1) of lword;
 
 -- Fixed pipeline structure
 constant BX_PIPELINE_STAGES: natural := 5; -- +/- 2bx pipeline

diff --git a/firmware/hdl/packages/top_decl.vhd b/firmware/hdl/packages/top_decl.vhd
@@ -8,6 +8,7 @@
 -- Dave Newbold, June 2014
 
 -- Version-history:
+-- HB 2023-09-29: changed quads 8..16 to "no_mgt".
 -- HB 2023-08-25: updated for new ZDC input.
 
 library IEEE;
@@ -46,15 +47,15 @@ package top_decl is
             5 => (gth_10g_std_lat, u_crc32, buf, no_fmt, buf, u_crc32, gth_10g_std_lat, 4, 11), -- 5 / 113
             6 => (gth_10g_std_lat, u_crc32, buf, no_fmt, buf, u_crc32, gth_10g_std_lat, 5, 12), -- 6 / 112
             7 => (gth_10g_std_lat, u_crc32, buf, demux, buf, u_crc32, gth_10g_std_lat, 5, 12), -- 7 / 111* --> scouting outputs
-            8 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 5, 12), -- 8 / 110
-            9 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 0, 7), -- 9 / 210
-            10 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 0, 7), -- 10 / 211*
-            11 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 0, 7), -- 11 / 212
-            12 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 1, 8), -- 12 / 213
-            13 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 1, 8), -- 13 / 214*
-            14 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 1, 8), -- 14 / 215
-            15 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 2, 9), -- 15 / 216
-            16 => (gth_5g, no_chk, no_buf, no_fmt, no_buf, no_chk, gth_5g, 2, 9), -- 16 / 217*
+            8 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 5, 12), -- 8 / 110
+            9 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 0, 7), -- 9 / 210
+            10 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 0, 7), -- 10 / 211*
+            11 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 0, 7), -- 11 / 212
+            12 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 1, 8), -- 12 / 213
+            13 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 1, 8), -- 13 / 214*
+            14 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 1, 8), -- 14 / 215
+            15 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 2, 9), -- 15 / 216
+            16 => (no_mgt, no_chk, no_buf, no_fmt, no_buf, no_chk, no_mgt, 2, 9), -- 16 / 217*
             17 => (gth_5g, u_crc32, buf, no_fmt, buf, u_crc32, gth_5g, 2, 9) -- 17 / 218 --> ZDC 5G optical input
         );
 

diff --git a/firmware/hdl/payload/frame/demux_lane_validation.vhd b/firmware/hdl/payload/frame/demux_lane_validation.vhd
diff --git a/firmware/hdl/payload/frame/mux.vhd b/firmware/hdl/payload/frame/mux.vhd
@@ -59,6 +59,3 @@ begin
     end process;
 
 end architecture;
-
-
-
diff --git a/firmware/hdl/payload/gtl/common/reg.vhd b/firmware/hdl/payload/gtl/common/reg.vhd
diff --git a/firmware/hdl/payload/gtl_module_tpl.vhd b/firmware/hdl/payload/gtl_module_tpl.vhd
@@ -2,6 +2,8 @@
 -- Global Trigger Logic module.
 
 -- Version history:
+-- HB 2023-09-28: v1.19.3: Used "no_chk" and "no_buf" at quads 8..16.
+-- HB 2023-09-25: v1.19.2: Removed unused files "demux_lane_validation.vhd" and "reg.vhd". Changed quads 8..16, inserted with gth_5g, but without checksum and buffers.
 -- HB 2023-09-01: v1.19.1: Added zdc_condition.vhd (was missing) and updated sim and dep file.
 -- HB 2023-08-25: v1.19.0: Used link 71 as ZDC 5G input. ZDC data structure changed (16 bits only on 5G link). Updated top_decl.vhd.
 -- HB 2023-04-15: v1.18.1: Bug fix muon index bits.

diff --git a/firmware/sim/scripts/templates/gtl_fdl_wrapper_tpl_questa.do b/firmware/sim/scripts/templates/gtl_fdl_wrapper_tpl_questa.do
@@ -163,7 +163,6 @@ vcom -93 -work work $HDL_DIR/payload/fdl_module.vhd
 vcom -93 -work work $HDL_DIR/packages/frame_addr_decode.vhd
 vcom -93 -work work $HDL_DIR/packages/frame_rb_pkg.vhd
 vcom -93 -work work $HDL_DIR/payload/frame/demux_lane_data.vhd
-vcom -93 -work work $HDL_DIR/payload/frame/demux_lane_validation.vhd
 vcom -93 -work work $HDL_DIR/payload/frame/frame_module_info.vhd
 vcom -93 -work work $HDL_DIR/payload/frame/frame_fabric.vhd
 vcom -93 -work work $HDL_DIR/payload/frame/lmp.vhd