[vm] register pressure MemoryCopyInstr on arm32 with element size 16

[dcharkes]

../../runtime/vm/compiler/backend/linearscan.cc: 2492: error: expected: unallocated->Start() < ToInstructionStart(register_use_pos)

While trying to add a unit test which uses the mem-copy instruction with element-size 16, the register allocator for arm32 ran out of registers. (It's trying to spill from the same location as the first use, a zero-length spill.)

We only have 16 registers in total, 8 of them are pinned in the Dart calling convention.

sdk/runtime/vm/constants_arm.h

Lines 81 to 97 in bc31fe4

	enum Register {
	R0 = 0,
	R1 = 1,
	R2 = 2,
	R3 = 3,
	R4 = 4,
	R5 = 5, // PP
	R6 = 6, // CODE_REG
	R7 = 7, // FP on iOS, DISPATCH_TABLE_REG on non-iOS (AOT only)
	R8 = 8,
	R9 = 9,
	R10 = 10, // THR
	R11 = 11, // FP on non-iOS, DISPATCH_TABLE_REG on iOS (AOT only)
	R12 = 12, // IP aka TMP
	R13 = 13, // SP
	R14 = 14, // LR
	R15 = 15, // PC

With element 16, this instruction requires 9 registers (4 temps, and 5 parameters).

sdk/runtime/vm/compiler/backend/il_arm.cc

Lines 158 to 175 in bc31fe4

	LocationSummary* MemoryCopyInstr::MakeLocationSummary(Zone* zone,
	bool opt) const {
	const intptr_t kNumInputs = 5;
	const intptr_t kNumTemps = element_size_ == 16 ? 4
	: element_size_ == 8 ? 2
	: 1;
	LocationSummary* locs = new (zone)
	LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
	locs->set_in(kSrcPos, Location::WritableRegister());
	locs->set_in(kDestPos, Location::WritableRegister());
	locs->set_in(kSrcStartPos, Location::RequiresRegister());
	locs->set_in(kDestStartPos, Location::RequiresRegister());
	locs->set_in(kLengthPos, Location::WritableRegister());
	for (intptr_t i = 0; i < kNumTemps; i++) {
	locs->set_temp(i, Location::RequiresRegister());
	}
	return locs;
	}

Since we're currently not exercising anything else than element-size 1, we'll not hit it in Dart code right now, but we should fix this.

Possible fix:

• Do the copy with 8 bytes and shift the length one to the left.

[rmacnak-google]

Could use the SIMD registers as the temps for the larger sizes. I see that gcc compiles a 16-byte copy with SIMD loads and stores:

void copy(uint64_t* src, uint64_t* dst) {
    uint64_t a = src[0];
    uint64_t b = src[1];
    dst[0] = a;
    dst[1] = b;
}

vld1.64 {d16-d17}, [r0:64]
vst1.64 {d16-d17}, [r1:64]
bx      lr