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How to set latency? #19

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josephernest opened this issue Oct 28, 2018 · 3 comments
Closed

How to set latency? #19

josephernest opened this issue Oct 28, 2018 · 3 comments
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enhancement

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@josephernest
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josephernest commented Oct 28, 2018 •
edited

When using FlexASIO with a DAW (such as Ableton Live or any other), we currently don't have any option to change the latency / buffer size. The usual worflow with other ASIO drivers - such as ASIO4ALL and my soundcards' ASIO drivers - is to click on the small Hardware setup button (see screenshot below) and then a Control Panel GUI is displayed, allowing to change the device latency. This is probably not needed for FlexASIO at this early stage - GUI design is always long to do. Just a simple flexasio.ini configuration file:

latency=1024

would be enough.

Also the Buffer size displayed in Ableton (1024 samples) doesn't match the one automatically selected internally by FlexASIO (3072 samples = 69.7 milliseconds), as it can be seen in the log below (see in particular the parts in bold in the log).

Question: how to manually force an output latency of 1024 or 512 samples?

image

2018-10-28T18:36:24.0302689+01:00 5880 4168 Logfile opened
2018-10-28T18:36:24.0302689+01:00 5880 4168 Log time source: GetSystemTimeAsFileTime
2018-10-28T18:36:24.0302689+01:00 5880 4168 Enabling PortAudio debug output redirection
2018-10-28T18:36:24.0312689+01:00 5880 4168 CFlexASIO::CFlexASIO()
2018-10-28T18:36:24.0312689+01:00 5880 4168 FlexASIO Release x64 0.3a built on 2018-10-27T23:16:46.2283106+01:00
2018-10-28T18:36:24.0312689+01:00 5880 4168 Host process: C:\ProgramData\Ableton\Live 10 Suite\Program\Ableton Live 10 Suite.exe
2018-10-28T18:36:24.0312689+01:00 5880 4168 PortAudio version: PortAudio V19.6.0-devel, revision 396fe4b
2018-10-28T18:36:24.0312689+01:00 5880 4168 CFlexASIO::init()
2018-10-28T18:36:24.0312689+01:00 5880 4168 Initializing PortAudio
2018-10-28T18:36:24.0672710+01:00 5880 4168 Selected host API #2 (Windows WASAPI)
2018-10-28T18:36:24.0672710+01:00 5880 4168 Getting input device info
2018-10-28T18:36:24.0672710+01:00 5880 4168 Selected input device: Microphone interne (Conexant 20672 SmartAudio HD)
2018-10-28T18:36:24.0672710+01:00 5880 4168 Getting output device info
2018-10-28T18:36:24.0672710+01:00 5880 4168 Selected output device: Speakers (Conexant 20672 SmartAudio HD)
2018-10-28T18:36:24.0672710+01:00 5880 4168 Initialized successfully
2018-10-28T18:36:24.0672710+01:00 5880 4168 CFlexASIO::getDriverName()
2018-10-28T18:36:24.0672710+01:00 5880 4168 CFlexASIO::getDriverVersion()
2018-10-28T18:36:24.0672710+01:00 5880 4168 CFlexASIO::getClockSources()
2018-10-28T18:36:24.0672710+01:00 5880 4168 CFlexASIO::setSampleRate(44100)
2018-10-28T18:36:24.0672710+01:00 5880 4168 CFlexASIO::getChannels()
2018-10-28T18:36:24.0672710+01:00 5880 4168 Returning 2 input channels and 2 output channels
2018-10-28T18:36:24.0672710+01:00 5880 4168 CFlexASIO::getBufferSize()
2018-10-28T18:36:24.0672710+01:00 5880 4168 Returning: min buffer size 48, max buffer size 48000, preferred buffer size 1024, granularity 1
2018-10-28T18:36:24.0672710+01:00 5880 4168 CFlexASIO::outputReady()
2018-10-28T18:36:24.0672710+01:00 5880 4168 CFlexASIO::createBuffers(4, 1024)
2018-10-28T18:36:24.0682710+01:00 5880 4168 Buffers instantiated, memory range : 0000000015BFE4B0-0000000015C064B0
2018-10-28T18:36:24.0682710+01:00 5880 4168 ASIO buffer #0 is input channel 0 - first half: 0000000015BFE4B0-0000000015BFF4B0 - second half: 0000000015C024B0-0000000015C034B0
2018-10-28T18:36:24.0682710+01:00 5880 4168 ASIO buffer #1 is input channel 1 - first half: 0000000015BFF4B0-0000000015C004B0 - second half: 0000000015C034B0-0000000015C044B0
2018-10-28T18:36:24.0682710+01:00 5880 4168 ASIO buffer #2 is output channel 0 - first half: 0000000015C004B0-0000000015C014B0 - second half: 0000000015C044B0-0000000015C054B0
2018-10-28T18:36:24.0682710+01:00 5880 4168 ASIO buffer #3 is output channel 1 - first half: 0000000015C014B0-0000000015C024B0 - second half: 0000000015C054B0-0000000015C064B0
2018-10-28T18:36:24.0682710+01:00 5880 4168 Opening PortAudio stream
2018-10-28T18:36:24.0682710+01:00 5880 4168 CFlexASIO::OpenStream(44100, 1024)
2018-10-28T18:36:24.1262744+01:00 5880 4168 CFlexASIO::getChannelInfo()
2018-10-28T18:36:24.1262744+01:00 5880 4168 Channel info requested for input channel 0
2018-10-28T18:36:24.1262744+01:00 5880 4168 Returning: IN 0 FL (Front Left), active, group 0, type 19
2018-10-28T18:36:24.1262744+01:00 5880 4168 CFlexASIO::getChannelInfo()
2018-10-28T18:36:24.1262744+01:00 5880 4168 Channel info requested for input channel 1
2018-10-28T18:36:24.1262744+01:00 5880 4168 Returning: IN 1 FR (Front Right), active, group 0, type 19
2018-10-28T18:36:24.1262744+01:00 5880 4168 CFlexASIO::getChannelInfo()
2018-10-28T18:36:24.1262744+01:00 5880 4168 Channel info requested for output channel 0
2018-10-28T18:36:24.1262744+01:00 5880 4168 Returning: OUT 0 FL (Front Left), active, group 0, type 19
2018-10-28T18:36:24.1262744+01:00 5880 4168 CFlexASIO::getChannelInfo()
2018-10-28T18:36:24.1262744+01:00 5880 4168 Channel info requested for output channel 1
2018-10-28T18:36:24.1262744+01:00 5880 4168 Returning: OUT 1 FR (Front Right), active, group 0, type 19
2018-10-28T18:36:24.1262744+01:00 5880 4168 CFlexASIO::getChannelInfo()
2018-10-28T18:36:24.1262744+01:00 5880 4168 Channel info requested for input channel 0
2018-10-28T18:36:24.1262744+01:00 5880 4168 Returning: IN 0 FL (Front Left), active, group 0, type 19
2018-10-28T18:36:24.1272744+01:00 5880 4168 CFlexASIO::getChannelInfo()
2018-10-28T18:36:24.1272744+01:00 5880 4168 Channel info requested for input channel 1
2018-10-28T18:36:24.1272744+01:00 5880 4168 Returning: IN 1 FR (Front Right), active, group 0, type 19
2018-10-28T18:36:24.1272744+01:00 5880 4168 CFlexASIO::getChannelInfo()
2018-10-28T18:36:24.1272744+01:00 5880 4168 Channel info requested for output channel 0
2018-10-28T18:36:24.1272744+01:00 5880 4168 Returning: OUT 0 FL (Front Left), active, group 0, type 19
2018-10-28T18:36:24.1272744+01:00 5880 4168 CFlexASIO::getChannelInfo()
2018-10-28T18:36:24.1272744+01:00 5880 4168 Channel info requested for output channel 1
2018-10-28T18:36:24.1272744+01:00 5880 4168 Returning: OUT 1 FR (Front Right), active, group 0, type 19
2018-10-28T18:36:24.1272744+01:00 5880 4168 CFlexASIO::getSampleRate()
2018-10-28T18:36:24.1272744+01:00 5880 4168 Returning sample rate: 44100
2018-10-28T18:36:24.1272744+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.1272744+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.1272744+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.1272744+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.1272744+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.1272744+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.1282745+01:00 5880 4168 CFlexASIO::canSampleRate(22050)
2018-10-28T18:36:24.1282745+01:00 5880 4168 CFlexASIO::OpenStream(22050, 0)
2018-10-28T18:36:24.1462755+01:00 5880 4168 Cannot do this sample rate: Invalid device
2018-10-28T18:36:24.1462755+01:00 5880 4168 CFlexASIO::canSampleRate(32000)
2018-10-28T18:36:24.1462755+01:00 5880 4168 CFlexASIO::OpenStream(32000, 0)
2018-10-28T18:36:24.1652766+01:00 5880 4168 Cannot do this sample rate: Invalid device
2018-10-28T18:36:24.1652766+01:00 5880 4168 CFlexASIO::canSampleRate(44100)
2018-10-28T18:36:24.1652766+01:00 5880 4168 CFlexASIO::OpenStream(44100, 0)
2018-10-28T18:36:24.1992785+01:00 5880 4168 Sample rate is available
2018-10-28T18:36:24.2092791+01:00 5880 4168 CFlexASIO::canSampleRate(48000)
2018-10-28T18:36:24.2092791+01:00 5880 4168 CFlexASIO::OpenStream(48000, 0)
2018-10-28T18:36:24.2282802+01:00 5880 4168 Cannot do this sample rate: Invalid device
2018-10-28T18:36:24.2282802+01:00 5880 4168 CFlexASIO::canSampleRate(88200)
2018-10-28T18:36:24.2282802+01:00 5880 4168 CFlexASIO::OpenStream(88200, 0)
2018-10-28T18:36:24.2462812+01:00 5880 4168 Cannot do this sample rate: Invalid device
2018-10-28T18:36:24.2462812+01:00 5880 4168 CFlexASIO::canSampleRate(96000)
2018-10-28T18:36:24.2462812+01:00 5880 4168 CFlexASIO::OpenStream(96000, 0)
2018-10-28T18:36:24.2652823+01:00 5880 4168 Cannot do this sample rate: Invalid device
2018-10-28T18:36:24.2652823+01:00 5880 4168 CFlexASIO::canSampleRate(176400)
2018-10-28T18:36:24.2652823+01:00 5880 4168 CFlexASIO::OpenStream(176400, 0)
2018-10-28T18:36:24.2842834+01:00 5880 4168 Cannot do this sample rate: Invalid device
2018-10-28T18:36:24.2842834+01:00 5880 4168 CFlexASIO::canSampleRate(192000)
2018-10-28T18:36:24.2842834+01:00 5880 4168 CFlexASIO::OpenStream(192000, 0)
2018-10-28T18:36:24.3032845+01:00 5880 4168 Cannot do this sample rate: Invalid device
2018-10-28T18:36:24.3032845+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.3032845+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.3032845+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.3032845+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.3062847+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.3062847+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.3062847+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.3062847+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.3062847+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.3062847+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.3062847+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.3062847+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.3062847+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.3062847+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.3062847+01:00 5880 4168 CFlexASIO::getLatencies()
2018-10-28T18:36:24.3062847+01:00 5880 4168 Returning input latency of 2048 samples and output latency of 3072 samples
2018-10-28T18:36:24.3072847+01:00 5880 4168 CFlexASIO::start()
2018-10-28T18:36:24.3072847+01:00 5880 4168 The host supports time info
2018-10-28T18:36:24.3072847+01:00 5880 4168 Starting stream
2018-10-28T18:36:24.3072847+01:00 5880 4168 Starting high resolution timer
2018-10-28T18:36:24.3082848+01:00 5880 4168 Started successfully
2018-10-28T18:36:24.3382865+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
2018-10-28T18:36:24.3382865+01:00 5880 5932 Transferring between PortAudio and buffer #0
2018-10-28T18:36:24.3382865+01:00 5880 5932 Firing ASIO bufferSwitchTimeInfo() callback with samplePosition 0, systemTime 33399623000000
2018-10-28T18:36:24.3382865+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:24.3582876+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
2018-10-28T18:36:24.3582876+01:00 5880 5932 Transferring between PortAudio and buffer #1
2018-10-28T18:36:24.3582876+01:00 5880 5932 Firing ASIO bufferSwitchTimeInfo() callback with samplePosition 1024, systemTime 33399654000000
2018-10-28T18:36:24.3582876+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:24.3782888+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
2018-10-28T18:36:24.3782888+01:00 5880 5932 Transferring between PortAudio and buffer #0
2018-10-28T18:36:24.3782888+01:00 5880 5932 Firing ASIO bufferSwitchTimeInfo() callback with samplePosition 2048, systemTime 33399674000000
2018-10-28T18:36:24.3782888+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:24.4082905+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
2018-10-28T18:36:24.4082905+01:00 5880 5932 Transferring between PortAudio and buffer #1
2018-10-28T18:36:24.4082905+01:00 5880 5932 Firing ASIO bufferSwitchTimeInfo() callback with samplePosition 3072, systemTime 33399694000000
2018-10-28T18:36:24.4082905+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:24.4302917+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
2018-10-28T18:36:24.4302917+01:00 5880 5932 Transferring between PortAudio and buffer #0
2018-10-28T18:36:24.4302917+01:00 5880 5932 Firing ASIO bufferSwitchTimeInfo() callback with samplePosition 4096, systemTime 33399724000000
2018-10-28T18:36:24.4312918+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:24.4492928+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
2018-10-28T18:36:24.4492928+01:00 5880 5932 Transferring between PortAudio and buffer #1
2018-10-28T18:36:24.4492928+01:00 5880 5932 Firing ASIO bufferSwitchTimeInfo() callback with samplePosition 5120, systemTime 33399747000000
2018-10-28T18:36:24.4492928+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:24.4692940+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
2018-10-28T18:36:24.4692940+01:00 5880 5932 Transferring between PortAudio and buffer #0
2018-10-28T18:36:24.4692940+01:00 5880 5932 Firing ASIO bufferSwitchTimeInfo() callback with samplePosition 6144, systemTime 33399765000000
2018-10-28T18:36:24.4692940+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:24.5012958+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
2018-10-28T18:36:24.5012958+01:00 5880 5932 Transferring between PortAudio and buffer #1
2018-10-28T18:36:24.5012958+01:00 5880 5932 Firing ASIO bufferSwitchTimeInfo() callback with samplePosition 7168, systemTime 33399785000000
2018-10-28T18:36:24.5012958+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:24.5222970+01:00 5880 5932 CFlexASIO::StreamCallback(1024)
...
2018-10-28T18:36:28.6365323+01:00 5880 5932 Returning from stream callback
2018-10-28T18:36:28.6375324+01:00 5880 4168 CFlexASIO::stop()
2018-10-28T18:36:28.6375324+01:00 5880 4168 Stopping stream
2018-10-28T18:36:28.6385324+01:00 5880 4168 Stopping high resolution timer
2018-10-28T18:36:28.6385324+01:00 5880 4168 Stopped successfully
2018-10-28T18:36:28.6385324+01:00 5880 4168 CFlexASIO::disposeBuffers()
2018-10-28T18:36:28.6385324+01:00 5880 4168 Closing PortAudio stream
2018-10-28T18:36:28.6645339+01:00 5880 4168 CFlexASIO::~CFlexASIO()
2018-10-28T18:36:28.6645339+01:00 5880 4168 Closing PortAudio
2018-10-28T18:36:28.6645339+01:00 5880 4168 PortAudio closed successfully
2018-10-28T18:36:28.6645339+01:00 5880 4168 Disabling PortAudio debug output redirection
2018-10-28T18:36:28.9855523+01:00 5880 4168 Closing logfile
@josephernest josephernest mentioned this issue Oct 28, 2018
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@dechamps
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Okay, so if I understand correctly, you're saying that some ASIO host applications (here, Ableton) do not let you customize the buffer size and only use the "preferred size" reported by the ASIO driver. In that case, yes, it makes perfect sense to make the preferred buffer size customizable as a configuration option; I'll do that as soon as the configuration infrastructure in #6 is in place.

Regarding latency: you should not assume that buffer size and latency are the same. That might be (mostly) true for most hardware ASIO drivers (or universal ASIO drivers that go directly to the hardware, such as ASIO4ALL), but it is not true with FlexASIO currently because it uses WASAPI Shared mode, which is not direct hardware access and typically incurs additional buffering, which adds additional latency on top of the ASIO buffer itself.

Therefore, there are multiple separate issues here:

  • As I said above, we need a way to customize the buffer size when the host application does not let you change it. Let's use the present issue for that.
  • By selecting an "exclusive" backend that accesses the hardware directly, latency can be reduced to (hopefully) what would be expected when using other ASIO drivers like ASIO4ALL or native hardware drivers. This is covered by Make FlexASIO configurable #6.
  • It might be possible to significantly reduce latency when using a shared backend (such as WASAPI Shared) by making sure that the buffer size is aligned to the Windows audio engine buffer size, which AFAIK is always exactly 20 ms. This might allow PortAudio to remove one layer of buffering. This needs to be confirmed, though. This is covered by Clarify how the latency reported by FlexASIO is computed #10.
  • The latency numbers that FlexASIO reports might be wrong, as the code is written naively and I might have made some wrong assumptions. This is also covered by Clarify how the latency reported by FlexASIO is computed #10.

@dechamps dechamps mentioned this issue Oct 29, 2018
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@dechamps
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In addition to making the buffer size configurable, I suspect there might also be ways to make FlexASIO more useful when it comes to suggesting optimal buffer sizes. Filed #20 about that.

@dechamps dechamps mentioned this issue Nov 1, 2018
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@dechamps dechamps mentioned this issue Nov 11, 2018
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@dechamps
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The new bufferSizeSamples option introduced in FlexASIO 0.5 can now be used to override the preferred buffer size. Thanks for the feedback!

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