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Coarse Grained Reconfigurable Array

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Versat is a Coarse Grained Reconfigurable Array (CGRA) IP core

Simulate

#Edit simulator path in Makefile and do:

make sim

Compile FPGA

#Edit FPGA path in Makefile and do:

source path/to/vivado/settings64.sh
make fpga

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  • Verilog 54.0%
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