16x16

16by16 complete, Edge Detection successfully simulated with Modelsim

4X4 Complete

4X4 EdgeDetection test sucessful.
4.0 version is skipped.

Verilog Version

Naive CNN 18 multiplication per clock cycle

Schematic Attempt

Naive CNN 18 multipliers per cell one time unit process complete

Schematic Attempt

Naive CNN 18 multipliers per cell run out of input pads