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Property description now taken from front-end Syntactic checks #944: Pull request #571 synchronize by kroening
June 22, 2024 18:09 1m 9s property-description
property-description
June 22, 2024 18:09 1m 9s
Property description now taken from front-end Build and Test HW-CBMC #1917: Pull request #571 synchronize by kroening
June 22, 2024 18:09 1m 56s property-description
property-description
June 22, 2024 18:09 1m 56s
Property description now taken from front-end Syntactic checks #943: Pull request #571 opened by kroening
June 22, 2024 18:08 1m 12s property-description
property-description
June 22, 2024 18:08 1m 12s
Property description now taken from front-end Build and Test HW-CBMC #1916: Pull request #571 opened by kroening
June 22, 2024 18:08 2m 0s property-description
property-description
June 22, 2024 18:08 2m 0s
Verilog: expr2verilog can now decode aval/bval constants Build and Test HW-CBMC #1915: Pull request #570 opened by kroening
June 22, 2024 00:02 1m 36s decode_aval_bval
decode_aval_bval
June 22, 2024 00:02 1m 36s
Verilog: expr2verilog can now decode aval/bval constants Syntactic checks #942: Pull request #570 opened by kroening
June 22, 2024 00:02 1m 22s decode_aval_bval
decode_aval_bval
June 22, 2024 00:02 1m 22s
cast from 2-valued to aval/bval 4-valued vectors Syntactic checks #941: Pull request #569 synchronize by kroening
June 21, 2024 23:46 1m 7s avalbval-tc
avalbval-tc
June 21, 2024 23:46 1m 7s
cast from 2-valued to aval/bval 4-valued vectors Build and Test HW-CBMC #1914: Pull request #569 synchronize by kroening
June 21, 2024 23:46 1m 31s avalbval-tc
avalbval-tc
June 21, 2024 23:46 1m 31s
cast from 2-valued to aval/bval 4-valued vectors Syntactic checks #940: Pull request #569 synchronize by kroening
June 21, 2024 23:39 1m 7s avalbval-tc
avalbval-tc
June 21, 2024 23:39 1m 7s
cast from 2-valued to aval/bval 4-valued vectors Build and Test HW-CBMC #1913: Pull request #569 synchronize by kroening
June 21, 2024 23:39 1m 39s avalbval-tc
avalbval-tc
June 21, 2024 23:39 1m 39s
cast from 2-valued to aval/bval 4-valued vectors Syntactic checks #939: Pull request #569 opened by kroening
June 21, 2024 23:36 1m 6s avalbval-tc
avalbval-tc
June 21, 2024 23:36 1m 6s
cast from 2-valued to aval/bval 4-valued vectors Build and Test HW-CBMC #1912: Pull request #569 opened by kroening
June 21, 2024 23:36 1m 45s avalbval-tc
avalbval-tc
June 21, 2024 23:36 1m 45s
Merge pull request #568 from diffblue/release-deb-arch Build and Test HW-CBMC #1911: Commit 459b5f8 pushed by tautschnig
June 21, 2024 20:58 1m 40s main
main
June 21, 2024 20:58 1m 40s
Merge pull request #565 from diffblue/equality1 Build and Test HW-CBMC #1910: Commit 0a5cbd8 pushed by tautschnig
June 21, 2024 20:56 2m 1s main
main
June 21, 2024 20:56 2m 1s
KNOWNBUG test for Verilog logical and case equality. Syntactic checks #938: Pull request #565 synchronize by kroening
June 21, 2024 17:53 1m 16s equality1
equality1
June 21, 2024 17:53 1m 16s
KNOWNBUG test for Verilog logical and case equality. Build and Test HW-CBMC #1909: Pull request #565 synchronize by kroening
June 21, 2024 17:53 7m 36s equality1
equality1
June 21, 2024 17:53 7m 36s
include architecture (amd64) in .deb file Build and Test HW-CBMC #1908: Pull request #568 opened by kroening
June 21, 2024 15:51 1m 44s release-deb-arch
release-deb-arch
June 21, 2024 15:51 1m 44s
include architecture (amd64) in .deb file Syntactic checks #937: Pull request #568 opened by kroening
June 21, 2024 15:51 1m 14s release-deb-arch
release-deb-arch
June 21, 2024 15:51 1m 14s
Merge pull request #567 from diffblue/verilog-expressions-tests Build and Test HW-CBMC #1907: Commit 95d47f4 pushed by kroening
June 21, 2024 15:03 7m 37s main
main
June 21, 2024 15:03 7m 37s
Merge pull request #566 from diffblue/cbmc-6.0.1 Build and Test HW-CBMC #1906: Commit 6379de4 pushed by tautschnig
June 21, 2024 14:58 7m 30s main
main
June 21, 2024 14:58 7m 30s
Verilog: consolidate expression-related tests in verilog/expressions Build and Test HW-CBMC #1905: Pull request #567 opened by kroening
June 21, 2024 14:56 1m 46s verilog-expressions-tests
verilog-expressions-tests
June 21, 2024 14:56 1m 46s
Verilog: consolidate expression-related tests in verilog/expressions Syntactic checks #936: Pull request #567 opened by kroening
June 21, 2024 14:56 1m 9s verilog-expressions-tests
verilog-expressions-tests
June 21, 2024 14:56 1m 9s
bump CBMC to 6.0.1 Syntactic checks #935: Pull request #566 opened by kroening
June 21, 2024 14:48 1m 10s cbmc-6.0.1
cbmc-6.0.1
June 21, 2024 14:48 1m 10s
bump CBMC to 6.0.1 Build and Test HW-CBMC #1904: Pull request #566 opened by kroening
June 21, 2024 14:48 7m 26s cbmc-6.0.1
cbmc-6.0.1
June 21, 2024 14:48 7m 26s
KNOWNBUG test for Verilog logical and case equality. Build and Test HW-CBMC #1903: Pull request #565 opened by kroening
June 21, 2024 14:46 2m 14s equality1
equality1
June 21, 2024 14:46 2m 14s