Fix ARMv7 JIT from XER optimization. #1237
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This was a subtle bug I introduced since I removed a LDR in one of the ComputeCarry functions. Basically since I wasn't loading the XER value prior to operations when I did a BIC tmp, tmp, 1 it would clear the first bit in our temp register but retain the rest of the "random" data from that temp register. This would then save in to xer_ca, which the Interpreter will use later without any masking to generate the XER value. Our XER generation helper functions don't do any masking since they were only expecting a single bit worth of data in xer_ca with the rest being zero. So now we only have one bit of data being stored in xer_ca from the ARMv7 JIT recompiler, and also a slight optimization in the ComputeCarry function that is used on the immediate path. There wasn't any reason to load xer_ca since it only contains one bit of data now.
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Fixes issue 7709 as well. |
Sonicadvance1
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Oct 8, 2014
Fix ARMv7 JIT from XER optimization.
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This was a subtle bug I introduced since I removed a LDR in one of the ComputeCarry functions.
Basically since I wasn't loading the XER value prior to operations when I did a BIC tmp, tmp, 1 it would clear the first bit in our temp register but
retain the rest of the "random" data from that temp register. This would then save in to xer_ca, which the Interpreter will use later without any
masking to generate the XER value. Our XER generation helper functions don't do any masking since they were only expecting a single bit worth of data
in xer_ca with the rest being zero.
So now we only have one bit of data being stored in xer_ca from the ARMv7 JIT recompiler, and also a slight optimization in the ComputeCarry function
that is used on the immediate path. There wasn't any reason to load xer_ca since it only contains one bit of data now.