Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

JitArm64: Remove unnecessary locking of W0 in psq_stXX #12488

Merged
merged 2 commits into from
Jan 15, 2024
Merged

JitArm64: Remove unnecessary locking of W0 in psq_stXX #12488

Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
d94b00e
JitArm64: Remove unnecessary locking of W0 in psq_stXX
JosJuice Jan 7, 2024
f2145c9
JitArm64: Update register comments in psq_lXX/psq_stXX
JosJuice Jan 7, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
15 changes: 8 additions & 7 deletions Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -27,9 +27,9 @@ void JitArm64::psq_lXX(UGeckoInstruction inst)
!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR));

// X30 is LR
// X0 is the address
// X1 contains the scale
// X2 is a temporary
// X0 is a temporary
// X1 is the address
// X2 is the scale
// Q0 is the return register
// Q1 is a temporary
const s32 offset = inst.SIMM_12;
Expand Down Expand Up @@ -156,8 +156,9 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR));

// X30 is LR
// X0 contains the scale
// X1 is the address
// X0 is a temporary
// X1 is the scale
// X2 is the address
// Q0 is the store register

const s32 offset = inst.SIMM_12;
Expand Down Expand Up @@ -204,7 +205,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
}

gpr.Lock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
if (!js.assumeNoPairedQuantize || jo.memcheck || !jo.fastmem)
if (!js.assumeNoPairedQuantize || !jo.fastmem)
gpr.Lock(ARM64Reg::W0);
if (!js.assumeNoPairedQuantize && !jo.fastmem)
gpr.Lock(ARM64Reg::W3);
Expand Down Expand Up @@ -283,7 +284,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)

gpr.Unlock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
fpr.Unlock(ARM64Reg::Q0);
if (!js.assumeNoPairedQuantize || jo.memcheck || !jo.fastmem)
if (!js.assumeNoPairedQuantize || !jo.fastmem)
gpr.Unlock(ARM64Reg::W0);
if (!js.assumeNoPairedQuantize && !jo.fastmem)
gpr.Unlock(ARM64Reg::W3);
Expand Down