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Add OpenBSD/arm64 support. #12782

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merged 1 commit into from
May 23, 2024
Merged

Add OpenBSD/arm64 support. #12782

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42 changes: 37 additions & 5 deletions Source/Core/Common/ArmCPUDetect.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -15,11 +15,16 @@
#include <Windows.h>
#include <arm64intr.h>
#include "Common/WindowsRegistry.h"
#else
#ifndef __FreeBSD__
#elif defined(__linux__)
#include <asm/hwcap.h>
#endif
#include <sys/auxv.h>
#elif defined(__FreeBSD__)
#include <sys/auxv.h>
#elif defined(__OpenBSD__)
#include <machine/armreg.h>
#include <machine/cpu.h>
#include <sys/sysctl.h>
#include <sys/types.h>
#endif

#include <fmt/format.h>
Expand Down Expand Up @@ -183,7 +188,7 @@ static bool Read_MIDR_EL1(u64* value)

#endif

#ifndef __APPLE__
#if defined(_WIN32) || defined(__linux__) || defined(__FreeBSD__)

static std::string MIDRToString(u64 midr)
{
Expand Down Expand Up @@ -248,7 +253,7 @@ void CPUInfo::Detect()
{
cpu_id = MIDRToString(reg);
}
#else
#elif defined(__linux__) || defined(__FreeBSD__)
// Linux, Android, and FreeBSD

#if defined(__FreeBSD__)
Expand Down Expand Up @@ -277,6 +282,33 @@ void CPUInfo::Detect()
{
cpu_id = MIDRToString(midr);
}
#elif defined(__OpenBSD__)
// OpenBSD
int mib[2];
size_t len;
char hwmodel[256];
uint64_t isar0;

mib[0] = CTL_HW;
mib[1] = HW_MODEL;
len = std::size(hwmodel);
if (sysctl(mib, 2, &hwmodel, &len, nullptr, 0) != -1)
model_name = std::string(hwmodel, len - 1);

mib[0] = CTL_MACHDEP;
mib[1] = CPU_ID_AA64ISAR0;
len = sizeof(isar0);
if (sysctl(mib, 2, &isar0, &len, nullptr, 0) != -1)
{
if (ID_AA64ISAR0_AES(isar0) >= ID_AA64ISAR0_AES_BASE)
bAES = true;
if (ID_AA64ISAR0_SHA1(isar0) >= ID_AA64ISAR0_SHA1_BASE)
bSHA1 = true;
if (ID_AA64ISAR0_SHA2(isar0) >= ID_AA64ISAR0_SHA2_BASE)
bSHA2 = true;
if (ID_AA64ISAR0_CRC32(isar0) >= ID_AA64ISAR0_CRC32_BASE)
bCRC32 = true;
}
#endif

model_name = ReplaceAll(model_name, ",", "_");
Expand Down
5 changes: 5 additions & 0 deletions Source/Core/Core/MachineContext.h
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Expand Up @@ -157,6 +157,11 @@ typedef ucontext_t SContext;
#define CTX_R14 sc_r14
#define CTX_R15 sc_r15
#define CTX_RIP sc_rip
#elif _M_ARM_64
#define CTX_REG(x) sc_x[x]
#define CTX_LR sc_lr
#define CTX_SP sc_sp
#define CTX_PC sc_elr
#else
#error No context definition for architecture
#endif
Expand Down