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PowerPC: Implement broken masking for uncached unaligned writes #9964

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merged 5 commits into from
Aug 4, 2021
Merged

PowerPC: Implement broken masking for uncached unaligned writes #9964

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c56526d
PowerPC: Keep track of write-through/cache-inhibited
JosJuice Jul 4, 2021
ecbce0a
PowerPC: Pass on full 32-bit register contents for 8/16-bit writes
JosJuice Jul 26, 2021
12629be
JitArm64: Call swap variants of memory write functions
JosJuice Jul 26, 2021
543ed8a
PowerPC: Implement broken masking for uncached unaligned writes
JosJuice Jul 26, 2021
f333c09
PowerPC: Implement PI interrupt for uncached unaligned writes
JosJuice Jul 26, 2021
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20 changes: 10 additions & 10 deletions Source/Core/Core/PowerPC/Interpreter/Interpreter_LoadStore.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -323,14 +323,14 @@ void Interpreter::lwzu(UGeckoInstruction inst)

void Interpreter::stb(UGeckoInstruction inst)
{
PowerPC::Write_U8((u8)rGPR[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
PowerPC::Write_U8(rGPR[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
}

void Interpreter::stbu(UGeckoInstruction inst)
{
const u32 address = Helper_Get_EA_U(PowerPC::ppcState, inst);

PowerPC::Write_U8((u8)rGPR[inst.RS], address);
PowerPC::Write_U8(rGPR[inst.RS], address);
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
{
rGPR[inst.RA] = address;
Expand Down Expand Up @@ -399,14 +399,14 @@ void Interpreter::stfsu(UGeckoInstruction inst)

void Interpreter::sth(UGeckoInstruction inst)
{
PowerPC::Write_U16((u16)rGPR[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
PowerPC::Write_U16(rGPR[inst.RS], Helper_Get_EA(PowerPC::ppcState, inst));
}

void Interpreter::sthu(UGeckoInstruction inst)
{
const u32 address = Helper_Get_EA_U(PowerPC::ppcState, inst);

PowerPC::Write_U16((u16)rGPR[inst.RS], address);
PowerPC::Write_U16(rGPR[inst.RS], address);
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
{
rGPR[inst.RA] = address;
Expand Down Expand Up @@ -731,7 +731,7 @@ void Interpreter::stbux(UGeckoInstruction inst)
{
const u32 address = Helper_Get_EA_UX(PowerPC::ppcState, inst);

PowerPC::Write_U8((u8)rGPR[inst.RS], address);
PowerPC::Write_U8(rGPR[inst.RS], address);
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
{
rGPR[inst.RA] = address;
Expand All @@ -740,7 +740,7 @@ void Interpreter::stbux(UGeckoInstruction inst)

void Interpreter::stbx(UGeckoInstruction inst)
{
PowerPC::Write_U8((u8)rGPR[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
PowerPC::Write_U8(rGPR[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
}

void Interpreter::stfdux(UGeckoInstruction inst)
Expand Down Expand Up @@ -819,14 +819,14 @@ void Interpreter::stfsx(UGeckoInstruction inst)

void Interpreter::sthbrx(UGeckoInstruction inst)
{
PowerPC::Write_U16(Common::swap16((u16)rGPR[inst.RS]), Helper_Get_EA_X(PowerPC::ppcState, inst));
PowerPC::Write_U16_Swap(rGPR[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
}

void Interpreter::sthux(UGeckoInstruction inst)
{
const u32 address = Helper_Get_EA_UX(PowerPC::ppcState, inst);

PowerPC::Write_U16((u16)rGPR[inst.RS], address);
PowerPC::Write_U16(rGPR[inst.RS], address);
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
{
rGPR[inst.RA] = address;
Expand All @@ -835,7 +835,7 @@ void Interpreter::sthux(UGeckoInstruction inst)

void Interpreter::sthx(UGeckoInstruction inst)
{
PowerPC::Write_U16((u16)rGPR[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
PowerPC::Write_U16(rGPR[inst.RS], Helper_Get_EA_X(PowerPC::ppcState, inst));
}

// lswi - bizarro string instruction
Expand Down Expand Up @@ -968,7 +968,7 @@ void Interpreter::stwbrx(UGeckoInstruction inst)
{
const u32 address = Helper_Get_EA_X(PowerPC::ppcState, inst);

PowerPC::Write_U32(Common::swap32(rGPR[inst.RS]), address);
PowerPC::Write_U32_Swap(rGPR[inst.RS], address);
}

// The following two instructions are for SMP communications. On a single
Expand Down
10 changes: 4 additions & 6 deletions Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -197,18 +197,16 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR
}
else if (flags & BackPatchInfo::FLAG_STORE)
{
ARM64Reg temp = ARM64Reg::W0;
temp = ByteswapBeforeStore(this, temp, RS, flags, false);
if (temp != ARM64Reg::W0)
MOV(ARM64Reg::W0, temp);
const bool reverse = (flags & BackPatchInfo::FLAG_REVERSE) != 0;

if (flags & BackPatchInfo::FLAG_SIZE_32)
MOVP2R(ARM64Reg::X8, &PowerPC::Write_U32);
MOVP2R(ARM64Reg::X8, reverse ? &PowerPC::Write_U32_Swap : &PowerPC::Write_U32);
else if (flags & BackPatchInfo::FLAG_SIZE_16)
MOVP2R(ARM64Reg::X8, &PowerPC::Write_U16);
MOVP2R(ARM64Reg::X8, reverse ? &PowerPC::Write_U16_Swap : &PowerPC::Write_U16);
else
MOVP2R(ARM64Reg::X8, &PowerPC::Write_U8);

MOV(ARM64Reg::W0, RS);
BLR(ARM64Reg::X8);
}
else if (flags & BackPatchInfo::FLAG_ZERO_256)
Expand Down
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