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Fix checks to accommodate register wraparounds in multi-reg ops (#101430
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Fixes issue #101070
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SwapnilGaikwad committed Apr 24, 2024
1 parent 36e01f7 commit 5fe1a56
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Showing 2 changed files with 14 additions and 4 deletions.
10 changes: 10 additions & 0 deletions src/coreclr/jit/codegen.h
Expand Up @@ -101,6 +101,16 @@ class CodeGen final : public CodeGenInterface
}
}

#if defined(TARGET_ARM64)
regNumber getNextSIMDRegWithWraparound(regNumber reg)
{
regNumber nextReg = REG_NEXT(reg);

// Wraparound if necessary, REG_V0 comes next after REG_V31.
return (nextReg > REG_V31) ? REG_V0 : nextReg;
}
#endif // defined(TARGET_ARM64)

static GenTreeIndir indirForm(var_types type, GenTree* base);
static GenTreeStoreInd storeIndirForm(var_types type, GenTree* base, GenTree* data);

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8 changes: 4 additions & 4 deletions src/coreclr/jit/hwintrinsiccodegenarm64.cpp
Expand Up @@ -833,7 +833,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)

GenTree* argNode = use.GetNode();
assert(argReg == argNode->GetRegNum());
argReg = REG_NEXT(argReg);
argReg = getNextSIMDRegWithWraparound(argReg);
}
assert((ins == INS_st2 && regCount == 2) || (ins == INS_st3 && regCount == 3) ||
(ins == INS_st4 && regCount == 4));
Expand Down Expand Up @@ -883,7 +883,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)

GenTree* argNode = use.GetNode();
assert(argReg == argNode->GetRegNum());
argReg = REG_NEXT(argReg);
argReg = getNextSIMDRegWithWraparound(argReg);
}
assert((ins == INS_st1_2regs && regCount == 2) || (ins == INS_st2 && regCount == 2) ||
(ins == INS_st1_3regs && regCount == 3) || (ins == INS_st3 && regCount == 3) ||
Expand Down Expand Up @@ -1186,7 +1186,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)

GenTree* argNode = use.GetNode();
assert(argReg == argNode->GetRegNum());
argReg = REG_NEXT(argReg);
argReg = getNextSIMDRegWithWraparound(argReg);
#endif
}
}
Expand Down Expand Up @@ -1241,7 +1241,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
assert(argReg == argNode->GetRegNum());
// and they should not interfere with targetReg
assert(targetReg != argReg);
argReg = REG_NEXT(argReg);
argReg = getNextSIMDRegWithWraparound(argReg);
#endif
}
}
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