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Arm64/SVE: Implement ConvertToInt32 and ConvertToUInt32 for float (#1…
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…03098)

* Added ConverToInt32 and ConvertToUInt32 for float inputs.

* Added flags to handle only low predicate registers.

* Fix whitespace

* Remove special codegen flag

* Added new test template for operations with different return types.

* Add new test template.
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ebepho committed Jun 12, 2024
1 parent 9a8c69a commit ced2117
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Showing 7 changed files with 474 additions and 40 deletions.
2 changes: 2 additions & 0 deletions src/coreclr/jit/hwintrinsiclistarm64sve.h
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Expand Up @@ -32,6 +32,8 @@ HARDWARE_INTRINSIC(Sve, Compute16BitAddresses,
HARDWARE_INTRINSIC(Sve, Compute32BitAddresses, -1, 2, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_adr, INS_invalid, INS_sve_adr, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen)
HARDWARE_INTRINSIC(Sve, Compute64BitAddresses, -1, 2, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_adr, INS_invalid, INS_sve_adr, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen)
HARDWARE_INTRINSIC(Sve, ConditionalSelect, -1, 3, true, {INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ExplicitMaskedOperation|HW_Flag_SupportsContainment)
HARDWARE_INTRINSIC(Sve, ConvertToInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, ConvertToUInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, Count16BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cnth, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
HARDWARE_INTRINSIC(Sve, Count32BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cntw, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
HARDWARE_INTRINSIC(Sve, Count64BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cntd, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
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Expand Up @@ -848,6 +848,30 @@ public new abstract class Arm64 : AdvSimd.Arm64
public static unsafe Vector<double> ConditionalSelect(Vector<double> mask, Vector<double> left, Vector<double> right) { throw new PlatformNotSupportedException(); }


/// ConvertToInt32 : Floating-point convert

/// <summary>
/// svint32_t svcvt_s32[_f32]_m(svint32_t inactive, svbool_t pg, svfloat32_t op)
/// FCVTZS Ztied.S, Pg/M, Zop.S
/// svint32_t svcvt_s32[_f32]_x(svbool_t pg, svfloat32_t op)
/// FCVTZS Ztied.S, Pg/M, Ztied.S
/// svint32_t svcvt_s32[_f32]_z(svbool_t pg, svfloat32_t op)
/// </summary>
public static unsafe Vector<int> ConvertToInt32(Vector<float> value) { throw new PlatformNotSupportedException(); }


/// ConvertToUInt32 : Floating-point convert

/// <summary>
/// svuint32_t svcvt_u32[_f32]_m(svuint32_t inactive, svbool_t pg, svfloat32_t op)
/// FCVTZU Ztied.S, Pg/M, Zop.S
/// svuint32_t svcvt_u32[_f32]_x(svbool_t pg, svfloat32_t op)
/// FCVTZU Ztied.S, Pg/M, Ztied.S
/// svuint32_t svcvt_u32[_f32]_z(svbool_t pg, svfloat32_t op)
/// </summary>
public static unsafe Vector<uint> ConvertToUInt32(Vector<float> value) { throw new PlatformNotSupportedException(); }


/// Count16BitElements : Count the number of 16-bit elements in a vector

/// <summary>
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Expand Up @@ -905,6 +905,30 @@ public new abstract class Arm64 : AdvSimd.Arm64
public static unsafe Vector<double> ConditionalSelect(Vector<double> mask, Vector<double> left, Vector<double> right) => ConditionalSelect(mask, left, right);


/// ConvertToInt32 : Floating-point convert

/// <summary>
/// svint32_t svcvt_s32[_f32]_m(svint32_t inactive, svbool_t pg, svfloat32_t op)
/// FCVTZS Ztied.S, Pg/M, Zop.S
/// svint32_t svcvt_s32[_f32]_x(svbool_t pg, svfloat32_t op)
/// FCVTZS Ztied.S, Pg/M, Ztied.S
/// svint32_t svcvt_s32[_f32]_z(svbool_t pg, svfloat32_t op)
/// </summary>
public static unsafe Vector<int> ConvertToInt32(Vector<float> value) => ConvertToInt32(value);


/// ConvertToUInt32 : Floating-point convert

/// <summary>
/// svuint32_t svcvt_u32[_f32]_m(svuint32_t inactive, svbool_t pg, svfloat32_t op)
/// FCVTZU Ztied.S, Pg/M, Zop.S
/// svuint32_t svcvt_u32[_f32]_x(svbool_t pg, svfloat32_t op)
/// FCVTZU Ztied.S, Pg/M, Ztied.S
/// svuint32_t svcvt_u32[_f32]_z(svbool_t pg, svfloat32_t op)
/// </summary>
public static unsafe Vector<uint> ConvertToUInt32(Vector<float> value) => ConvertToUInt32(value);


/// Count16BitElements : Count the number of 16-bit elements in a vector

/// <summary>
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Expand Up @@ -4307,11 +4307,14 @@ public new abstract partial class Arm64 : System.Runtime.Intrinsics.Arm.AdvSimd.
public static System.Numerics.Vector<float> ConditionalSelect(System.Numerics.Vector<float> mask, System.Numerics.Vector<float> left, System.Numerics.Vector<float> right) { throw null; }
public static System.Numerics.Vector<double> ConditionalSelect(System.Numerics.Vector<double> mask, System.Numerics.Vector<double> left, System.Numerics.Vector<double> right) { throw null; }

public static System.Numerics.Vector<int> ConvertToInt32(System.Numerics.Vector<float> value) { throw null; }
public static System.Numerics.Vector<uint> ConvertToUInt32(System.Numerics.Vector<float> value) { throw null; }

public static ulong Count16BitElements([ConstantExpected] SveMaskPattern pattern = SveMaskPattern.All) { throw null; }
public static ulong Count32BitElements([ConstantExpected] SveMaskPattern pattern = SveMaskPattern.All) { throw null; }
public static ulong Count64BitElements([ConstantExpected] SveMaskPattern pattern = SveMaskPattern.All) { throw null; }
public static ulong Count8BitElements([ConstantExpected] SveMaskPattern pattern = SveMaskPattern.All) { throw null; }

public static System.Numerics.Vector<byte> CreateFalseMaskByte() { throw null; }
public static System.Numerics.Vector<double> CreateFalseMaskDouble() { throw null; }
public static System.Numerics.Vector<short> CreateFalseMaskInt16() { throw null; }
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