ARM/Linux build warning fix related with unw

[myungjoo]

If we try to cross build ARM/Linux binaries of CoreCLR, we get the following clang warning, which is set to stop building.

[  4%] In file included from /source/tizen_3.0/dotnet/coreclr/src/pal/src/exception/seh.cpp:321:
/source/tizen_3.0/dotnet/coreclr/src/pal/src/exception/seh-unwind.cpp:248:10: error: use of SP or PC in the list is deprecated [-Werror,-Winline-asm]
    st = unw_getcontext(&unwContext);
         ^
/source/tizen_3.0/dotnet/coreclr_upstreaming/cross/rootfs/arm//usr/include/libunwind-common.h:108:29: note: expanded from macro 'unw_getcontext'
#define unw_getcontext(uc)              unw_tdep_getcontext(uc)
                                        ^
/source/tizen_3.0/dotnet/coreclr_upstreaming/cross/rootfs/arm//usr/include/libunwind-arm.h:279:6: note: expanded from macro 'unw_tdep_getcontext'
    "stmia %[base], {r0-r15}\n"                                         \
     ^
<inline asm>:5:1: note: instantiated into assembly here
stmia r0, {r0-r15}
^

[janvorli]

@myungjoo ARM doc says that SP and PC cannot be in the list of registers of the STM instruction:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489g/Cihcadda.html
So the warning from clang seems to reflect that.
But I guess you would know much better than me what really happens when those registers are in there.

[myungjoo]

@janvorli Yes, that is a dilemma for an atomic context-saver. ARM doc and compilers say you cannot save SP or PC with other registers; but you need to do so if you want to do it atomically, allowing them to be consistent. In general programming, such behaviors should be not allowed, but for "special" libraries such as LIBUNWIND, it appears to be inevitable. Note that the warning is coming from LIBUNWIND code, not CoreCLR code.

• We cannot have PC or SP in the list if it's THUMB instruction.
• We may have them, but not "recommended" if it's ARM instruction.
  (The libunwind code changes the mode from THUMB to ARM if it's at THUMB state.)

[janvorli]

@myungjoo Thank you for the explanation! I didn't know it switches to the ARM mode.

[myungjoo]

(libunwind, include/libunwind-arm.h, from Line 273)

#else /* __thumb__ */
#define unw_tdep_getcontext(uc) (({                                     \
  unw_tdep_context_t *unw_ctx = (uc);                                   \
  register unsigned long *unw_base asm ("r0") = unw_ctx->regs;          \
  __asm__ __volatile__ (                                                \
    ".align 2\nbx pc\nnop\n.code 32\n"                                  \
    "stmia %[base], {r0-r15}\n"                                         \
    "orr %[base], pc, dotnet/coreclr#1\nbx %[base]"                                   \
    : [base] "+r" (unw_base) : : "memory", "cc");                       \
  }), 0)
#endif

.code 32 says the following stmia is ARM instruction. bx pc enforces mode change accordingly.

Anyway, I have updated the pull-request so that it will disable -Winline-asm only for seh.cpp.