Fortunac/output register comparison #56
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codyroux
reviewed
Aug 18, 2019
| @@ -166,7 +166,9 @@ let loop_exit_pre (env : t) (node : Graphs.Ir.Node.t) (graph : Graphs.Ir.t) | |||
| ) in | |||
| match exit_node with | |||
| | None -> None | |||
| | Some e -> get_precondition env e | |||
| | Some e -> | |||
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This seems unrelated to the feature in this PR, maybe we should revert this?
codyroux
reviewed
Aug 18, 2019
| @@ -35,7 +35,7 @@ let assert_z3_compare (test_ctx : test_ctxt) (z3_ctx : Z3.context) (body1 : stri | |||
| ~pp_diff:(fun ff (exp, real) -> | |||
| Format.fprintf ff "\n\nComparing:\n%s\nand\n\n%s\nCompare_prop:\n%a\n\n%!" | |||
| body1 body2 Constr.pp_constr pre; | |||
| print_z3_model ff solver exp real) | |||
| print_z3_model ff solver exp real z3_ctx pre) | |||
|
Other than the minor comments, it looks good! |
This was referenced Aug 20, 2019
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Allows the user to specify what registers to check for equivalence with:
--wp-output-vars=RDI,RSI,RCX,...