Skip to content

Commit

Permalink
llvm: Update baseline to 6246b495adcbdff7d2ec4f37dfb656542adf909d
Browse files Browse the repository at this point in the history
  • Loading branch information
github-actions[bot] committed May 21, 2024
1 parent 7774ea4 commit 9657279
Show file tree
Hide file tree
Showing 41 changed files with 159 additions and 135 deletions.
2 changes: 1 addition & 1 deletion llvm/llvm-project
Submodule llvm-project updated 31 files
+1 −1 clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
+1 −1 llvm/lib/Support/LockFileManager.cpp
+25 −11 llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
+14 −6 llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+4 −0 llvm/lib/Target/RISCV/RISCVISelLowering.h
+41 −37 llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+7 −5 llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
+9 −5 llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+2 −2 llvm/lib/Transforms/Scalar/SROA.cpp
+38 −34 llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
+1 −2 llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
+0 −3 llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
+5 −12 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
+2 −13 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
+1 −2 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
+3 −6 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
+9 −14 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
+23 −50 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
+4 −8 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
+24 −12 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
+4 −8 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-transpose.ll
+2 −3 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
+4 −7 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
+0 −1 llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
+4 −7 llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
+2 −4 llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
+16 −38 llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
+0 −1 llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
+2 −2 llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
+1 −1 mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
+2 −1 utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
8 changes: 4 additions & 4 deletions result/rvv/037268fb46a66c42.S
Original file line number Diff line number Diff line change
Expand Up @@ -5,8 +5,8 @@ func000000000000000a: # @func000000000000000a
vadd.vi v8, v8, -1
li a0, 63
vsrl.vx v10, v8, a0
vadd.vv v8, v8, v10
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v8, v10
ret
func0000000000000002: # @func0000000000000002
vsetivli zero, 4, e64, m2, ta, ma
Expand All @@ -15,6 +15,6 @@ func0000000000000002: # @func0000000000000002
vadd.vi v8, v8, -1
li a0, 63
vsrl.vx v10, v8, a0
vadd.vv v8, v8, v10
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v8, v10
ret
9 changes: 4 additions & 5 deletions result/rvv/04a9fb8041811b0c.S
Original file line number Diff line number Diff line change
@@ -1,10 +1,9 @@
func000000000000002b: # @func000000000000002b
vsetivli zero, 4, e64, m2, ta, ma
vmv.v.i v10, -1
vsetvli zero, zero, e32, m1, ta, ma
vwaddu.wv v10, v10, v8
vsetvli zero, zero, e64, m2, ta, ma
vsrl.vi v8, v10, 1
vzext.vf2 v10, v8
li a0, -1
csrwi vxrm, 2
vaadd.vx v8, v10, a0
vadd.vi v8, v8, 1
li a0, -3
srli a0, a0, 1
Expand Down
10 changes: 5 additions & 5 deletions result/rvv/07185607a67a1e6e.S
Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
func0000000000000029: # @func0000000000000029
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v8, v8, 4
vadd.vi v8, v8, 1
vadd.vi v10, v8, 1
li a0, 63
vsrl.vx v10, v8, a0
vadd.vv v8, v8, v10
vsll.vi v8, v8, 3
vand.vi v8, v8, -16
vsrl.vx v10, v10, a0
csrwi vxrm, 0
vaadd.vv v8, v8, v10
vsll.vi v8, v8, 4
ret
5 changes: 3 additions & 2 deletions result/rvv/0e9135683758ace9.S
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
func0000000000000002: # @func0000000000000002
csrwi vxrm, 2
vsetivli zero, 8, e16, m1, ta, ma
vwadd.vv v10, v8, v9
vaadd.vv v10, v8, v9
vsetvli zero, zero, e32, m2, ta, ma
vsra.vi v8, v10, 1
vsext.vf2 v8, v10
ret
4 changes: 2 additions & 2 deletions result/rvv/137bdae4e4b65805.S
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,6 @@ func0000000000000002: # @func0000000000000002
vwsubu.vv v10, v8, v9
vsetvli zero, zero, e32, m2, ta, ma
vsrl.vi v8, v10, 31
vadd.vv v8, v10, v8
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v10, v8
ret
4 changes: 2 additions & 2 deletions result/rvv/14083fb173c7a87c.S
Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,8 @@ func0000000000000008: # @func0000000000000008
vsetivli zero, 4, e32, m1, ta, ma
vsra.vi v10, v9, 1
vsrl.vi v9, v9, 31
vadd.vv v9, v10, v9
vsra.vi v9, v9, 1
csrwi vxrm, 2
vaadd.vv v9, v10, v9
vsub.vv v10, v8, v9
vsetvli zero, zero, e64, m2, ta, ma
vsext.vf2 v8, v10
Expand Down
5 changes: 3 additions & 2 deletions result/rvv/15eaa6afd6e29fd4.S
Original file line number Diff line number Diff line change
@@ -1,8 +1,9 @@
func00000000000000b1: # @func00000000000000b1
vsetivli zero, 4, e64, m2, ta, ma
vsrl.vi v10, v10, 3
vadd.vi v10, v10, -2
vsra.vi v10, v10, 1
li a0, -2
csrwi vxrm, 2
vaadd.vx v10, v10, a0
vmseq.vv v12, v10, v8
vmand.mm v0, v0, v12
ret
8 changes: 4 additions & 4 deletions result/rvv/166d05226c04955c.S
Original file line number Diff line number Diff line change
Expand Up @@ -4,15 +4,15 @@ func000000000000000a: # @func000000000000000a
vadd.vi v8, v8, -1
li a0, 63
vsrl.vx v10, v8, a0
vadd.vv v8, v8, v10
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v8, v10
ret
func0000000000000002: # @func0000000000000002
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v8, v8, 3
vadd.vi v8, v8, -1
li a0, 63
vsrl.vx v10, v8, a0
vadd.vv v8, v8, v10
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v8, v10
ret
4 changes: 2 additions & 2 deletions result/rvv/187e30341b0e3637.S
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,6 @@ func0000000000000002: # @func0000000000000002
vsra.vi v10, v8, 3
li a0, 63
vsrl.vx v8, v8, a0
vadd.vv v8, v10, v8
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v10, v8
ret
4 changes: 2 additions & 2 deletions result/rvv/2f6c24c6dd8e5c8b.S
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ func0000000000000002: # @func0000000000000002
vwadd.vx v10, v8, a0
vsetvli zero, zero, e32, m2, ta, ma
vsrl.vi v8, v10, 31
vadd.vv v8, v10, v8
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v10, v8
vrsub.vi v8, v8, 0
ret
4 changes: 2 additions & 2 deletions result/rvv/33fd4c9a71e8f178.S
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,8 @@ func0000000000000002: # @func0000000000000002
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v10, v10, 1
vsra.vi v8, v8, 1
vadd.vv v8, v8, v10
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v8, v10
ret
func0000000000000012: # @func0000000000000012
vsetivli zero, 4, e64, m2, ta, ma
Expand Down
5 changes: 3 additions & 2 deletions result/rvv/3c96db7f56271f2c.S
Original file line number Diff line number Diff line change
@@ -1,7 +1,8 @@
func0000000000000031: # @func0000000000000031
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v10, v10, 2
vadd.vi v10, v10, -2
vsra.vi v10, v10, 1
li a0, -2
csrwi vxrm, 2
vaadd.vx v10, v10, a0
vmseq.vv v0, v10, v8
ret
4 changes: 2 additions & 2 deletions result/rvv/3d884e1d5fdf40ab.S
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,8 @@ func0000000000000008: # @func0000000000000008
vwadd.vx v10, v8, a0
vsetvli zero, zero, e32, m2, ta, ma
vsrl.vi v8, v10, 31
vadd.vv v8, v10, v8
vsrl.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v10, v8
vrsub.vi v10, v8, 0
vsetvli zero, zero, e16, m1, ta, ma
vnsrl.wi v8, v10, 0
Expand Down
8 changes: 4 additions & 4 deletions result/rvv/4a0b614bca6b8302.S
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,8 @@ func0000000000000008: # @func0000000000000008
vwadd.vx v12, v10, a0
vsetvli zero, zero, e32, m2, ta, ma
vsrl.vi v10, v12, 31
vadd.vv v10, v12, v10
vsra.vi v10, v10, 1
csrwi vxrm, 2
vaadd.vv v10, v12, v10
vsub.vv v8, v8, v10
ret
func0000000000000009: # @func0000000000000009
Expand All @@ -14,7 +14,7 @@ func0000000000000009: # @func0000000000000009
vwadd.vx v12, v10, a0
vsetvli zero, zero, e32, m2, ta, ma
vsrl.vi v10, v12, 31
vadd.vv v10, v12, v10
vsra.vi v10, v10, 1
csrwi vxrm, 2
vaadd.vv v10, v12, v10
vsub.vv v8, v8, v10
ret
5 changes: 3 additions & 2 deletions result/rvv/53e6af8fbe768e2b.S
Original file line number Diff line number Diff line change
@@ -1,7 +1,8 @@
func00000000000000b1: # @func00000000000000b1
vsetivli zero, 4, e64, m2, ta, ma
vsrl.vi v10, v10, 3
vadd.vi v10, v10, -2
vsra.vi v10, v10, 1
li a0, -2
csrwi vxrm, 2
vaadd.vx v10, v10, a0
vmseq.vv v0, v10, v8
ret
10 changes: 6 additions & 4 deletions result/rvv/5f40d2f292eae227.S
Original file line number Diff line number Diff line change
@@ -1,14 +1,16 @@
func00000000000000b1: # @func00000000000000b1
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v10, v10, 2
vadd.vi v10, v10, -2
vsra.vi v10, v10, 1
li a0, -2
csrwi vxrm, 2
vaadd.vx v10, v10, a0
vmseq.vv v0, v10, v8
ret
func0000000000000031: # @func0000000000000031
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v10, v10, 3
vadd.vi v10, v10, -2
vsra.vi v10, v10, 1
li a0, -2
csrwi vxrm, 2
vaadd.vx v10, v10, a0
vmseq.vv v0, v10, v8
ret
10 changes: 6 additions & 4 deletions result/rvv/624d65763411bd5f.S
Original file line number Diff line number Diff line change
Expand Up @@ -2,15 +2,17 @@ func00000000000000b1: # @func00000000000000b1
vsetivli zero, 4, e64, m2, ta, ma
vsub.vv v10, v10, v12
vsra.vi v10, v10, 2
vadd.vi v10, v10, -2
vsra.vi v10, v10, 1
li a0, -2
csrwi vxrm, 2
vaadd.vx v10, v10, a0
vmseq.vv v0, v10, v8
ret
func0000000000000031: # @func0000000000000031
vsetivli zero, 4, e64, m2, ta, ma
vsub.vv v10, v10, v12
vsra.vi v10, v10, 3
vadd.vi v10, v10, -2
vsra.vi v10, v10, 1
li a0, -2
csrwi vxrm, 2
vaadd.vx v10, v10, a0
vmseq.vv v0, v10, v8
ret
5 changes: 3 additions & 2 deletions result/rvv/6524274b350c154c.S
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,9 @@ func0000000000000002: # @func0000000000000002
ret
func0000000000000003: # @func0000000000000003
li a0, -1
csrwi vxrm, 2
vsetivli zero, 8, e16, m1, ta, ma
vwadd.vx v10, v8, a0
vaadd.vx v10, v8, a0
vsetvli zero, zero, e32, m2, ta, ma
vsra.vi v8, v10, 1
vsext.vf2 v8, v10
ret
10 changes: 8 additions & 2 deletions result/rvv/73c7aed3ade0240f.S
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,15 @@ func0000000000000003: # @func0000000000000003
li a0, 126
vsetivli zero, 8, e32, m2, ta, ma
vand.vx v8, v8, a0
vsetvli zero, zero, e16, m1, ta, ma
vnsrl.wi v10, v8, 0
vsetvli zero, zero, e8, mf2, ta, ma
vnsrl.wi v8, v10, 0
li a0, -52
vadd.vx v8, v8, a0
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vx v10, v8, a0
vsetvli zero, zero, e32, m2, ta, ma
vsext.vf4 v8, v10
ret
func0000000000000001: # @func0000000000000001
li a0, -1
Expand Down
8 changes: 4 additions & 4 deletions result/rvv/7e881aac87e981e4.S
Original file line number Diff line number Diff line change
Expand Up @@ -3,15 +3,15 @@ func0000000000000001: # @func0000000000000001
vsra.vi v12, v10, 1
li a0, 63
vsrl.vx v10, v10, a0
vadd.vv v10, v12, v10
vsra.vi v10, v10, 1
csrwi vxrm, 2
vaadd.vv v10, v12, v10
vadd.vv v8, v10, v8
ret
func0000000000000008: # @func0000000000000008
vsetivli zero, 8, e32, m2, ta, ma
vsra.vi v12, v10, 1
vsrl.vi v10, v10, 31
vadd.vv v10, v12, v10
vsra.vi v10, v10, 1
csrwi vxrm, 2
vaadd.vv v10, v12, v10
vsub.vv v8, v8, v10
ret
8 changes: 4 additions & 4 deletions result/rvv/97d34f7277729fed.S
Original file line number Diff line number Diff line change
Expand Up @@ -2,10 +2,10 @@ func00000000000000aa: # @func00000000000000aa
vsetivli zero, 4, e64, m2, ta, ma
vsub.vv v10, v10, v12
vsra.vi v10, v10, 4
vadd.vi v10, v10, 1
vadd.vi v12, v10, 1
li a0, 63
vsrl.vx v12, v10, a0
vadd.vv v10, v10, v12
vsra.vi v10, v10, 1
vsrl.vx v12, v12, a0
csrwi vxrm, 0
vaadd.vv v10, v10, v12
vmslt.vv v0, v8, v10
ret
5 changes: 3 additions & 2 deletions result/rvv/9b84d878754e1c31.S
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
func0000000000000003: # @func0000000000000003
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v8, v8, 2
vadd.vi v8, v8, -2
vsra.vi v8, v8, 1
li a0, -2
csrwi vxrm, 2
vaadd.vx v8, v8, a0
ret
16 changes: 8 additions & 8 deletions result/rvv/a3d4b0fbcf8d64f6.S
Original file line number Diff line number Diff line change
@@ -1,22 +1,22 @@
func0000000000000296: # @func0000000000000296
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v10, v10, 4
vadd.vi v10, v10, 1
vadd.vi v12, v10, 1
li a0, 63
vsrl.vx v12, v10, a0
vadd.vv v10, v10, v12
vsra.vi v10, v10, 1
vsrl.vx v12, v12, a0
csrwi vxrm, 0
vaadd.vv v10, v10, v12
vsll.vi v8, v8, 2
vmslt.vv v0, v8, v10
ret
func0000000000000286: # @func0000000000000286
vsetivli zero, 4, e64, m2, ta, ma
vsra.vi v10, v10, 3
vadd.vi v10, v10, 1
vadd.vi v12, v10, 1
li a0, 63
vsrl.vx v12, v10, a0
vadd.vv v10, v10, v12
vsra.vi v10, v10, 1
vsrl.vx v12, v12, a0
csrwi vxrm, 0
vaadd.vv v10, v10, v12
vsll.vi v8, v8, 2
vmslt.vv v0, v8, v10
ret
12 changes: 3 additions & 9 deletions result/rvv/b21956dff400f64e.S
Original file line number Diff line number Diff line change
@@ -1,11 +1,5 @@
func0000000000000008: # @func0000000000000008
vsetivli zero, 4, e32, m1, ta, ma
vsext.vf4 v10, v9
vsext.vf4 v9, v8
vwadd.vv v12, v9, v10
vnsrl.wi v8, v12, 1
vsetvli zero, zero, e16, mf2, ta, ma
vnsrl.wi v8, v8, 0
vsetvli zero, zero, e8, mf4, ta, ma
vnsrl.wi v8, v8, 0
csrwi vxrm, 2
vsetivli zero, 4, e8, mf4, ta, ma
vaadd.vv v8, v8, v9
ret
4 changes: 2 additions & 2 deletions result/rvv/b3defe9c54621614.S
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,6 @@ func0000000000000008: # @func0000000000000008
vsetvli zero, zero, e8, mf2, ta, ma
vnsrl.wi v8, v10, 0
vsrl.vi v9, v8, 7
vadd.vv v8, v8, v9
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v8, v9
ret
10 changes: 5 additions & 5 deletions result/rvv/b45aaad152bc6ef3.S
Original file line number Diff line number Diff line change
Expand Up @@ -2,10 +2,10 @@ func0000000000000029: # @func0000000000000029
vsetivli zero, 4, e64, m2, ta, ma
vsub.vv v8, v8, v10
vsra.vi v8, v8, 4
vadd.vi v8, v8, 1
vadd.vi v10, v8, 1
li a0, 63
vsrl.vx v10, v8, a0
vadd.vv v8, v8, v10
vsll.vi v8, v8, 3
vand.vi v8, v8, -16
vsrl.vx v10, v10, a0
csrwi vxrm, 0
vaadd.vv v8, v8, v10
vsll.vi v8, v8, 4
ret
4 changes: 2 additions & 2 deletions result/rvv/c0c6aca290aa6c97.S
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,6 @@ func0000000000000002: # @func0000000000000002
vadd.vi v8, v8, -1
li a0, 63
vsrl.vx v10, v8, a0
vadd.vv v8, v8, v10
vsra.vi v8, v8, 1
csrwi vxrm, 2
vaadd.vv v8, v8, v10
ret
Loading

0 comments on commit 9657279

Please sign in to comment.