Instruction decoding fix: Alias ORR to MOV when the first source oper…

…and is WZR and the 'shift' and 'imm6' fields are both 0.
dyninst · Nov 6, 2016 · 5f9bbfd · 5f9bbfd
1 parent 2e550dc
commit 5f9bbfd
Showing 1 changed file with 9 additions and 1 deletion.
diff --git a/instructionAPI/src/InstructionDecoder-aarch64.C b/instructionAPI/src/InstructionDecoder-aarch64.C
@@ -2544,7 +2544,15 @@ Expression::Ptr InstructionDecoder_aarch64::makeMemRefExPair2(){
             else if (hasShift) {
                 if (IS_INSN_ADDSUB_SHIFT(insn) || IS_INSN_LOGICAL_SHIFT(insn))    //add-sub shifted | logical shifted
                 {
-                    processShiftFieldShiftedInsn(immLen, immVal);
+                    if(IS_INSN_LOGICAL_SHIFT(insn) && shiftField == 0 && field<5, 9>(insn) == 0x1F && immVal == 0) {
+                        insn_in_progress->getOperation().operationID = aarch64_op_mov_orr_log_shift;
+                        insn_in_progress->getOperation().mnemonic = "mov";
+                        skipRn = true;
+
+                        insn_in_progress->appendOperand(makeRmExpr(), true, false);
+                    } else {
+                        processShiftFieldShiftedInsn(immLen, immVal);
+                    }
                 }
                 else if (IS_INSN_ADDSUB_IMM(insn))        //add-sub (immediate)
                 {