Add mxcsr

This is the SSE Control Status Word register. The AMD64 ABI doc says it's 128 bits, but it's actually 32.
dyninst · Nov 28, 2023 · a2469f4 · a2469f4
1 parent d36550c
commit a2469f4
Show file tree

Hide file tree

Showing 3 changed files with 7 additions and 5 deletions.
diff --git a/common/h/registers/x86_64_regs.h b/common/h/registers/x86_64_regs.h
@@ -61,7 +61,7 @@ namespace Dyninst { namespace x86_64 {
   const signed int XMMS   = 0x00000800; // 128-bit SSE, FC16, XOP, AVX, and FMA3/4
   const signed int YMMS   = 0x00000900; // 256-bit SSE, AVX2, FMA3/4
   const signed int ZMMS   = 0x00000A00; // 512-bit AVX-512/AVX10
-  const signed int KMSKS  = 0x00000B00;  // 64-bit mask from AVX-512/AVX10
+  const signed int KMSKS  = 0x00000B00; // 64-bit mask from AVX-512/AVX10
 
   /* Register Categories */
   const signed int GPR    = 0x00010000;  // General-Purpose Registers
@@ -316,6 +316,7 @@ namespace Dyninst { namespace x86_64 {
   DEF_REGISTER(     xmm29,   0x1D |  XMMS |   XMM | Arch_x86_64, "x86_64");
   DEF_REGISTER(     xmm30,   0x1E |  XMMS |   XMM | Arch_x86_64, "x86_64");
   DEF_REGISTER(     xmm31,   0x1F |  XMMS |   XMM | Arch_x86_64, "x86_64");
+  DEF_REGISTER(     mxcsr,   0x20 | D_REG |   XMM | Arch_x86_64, "x86_64");
 
   DEF_REGISTER(      ymm0,   0x00 |  YMMS |   YMM | Arch_x86_64, "x86_64");
   DEF_REGISTER(      ymm1,   0x01 |  YMMS |   YMM | Arch_x86_64, "x86_64");

diff --git a/common/h/registers/x86_regs.h b/common/h/registers/x86_regs.h
@@ -246,6 +246,7 @@ namespace Dyninst { namespace x86 {
   DEF_REGISTER(      xmm5,   0x05 |  XMMS |   XMM | Arch_x86, "x86");
   DEF_REGISTER(      xmm6,   0x06 |  XMMS |   XMM | Arch_x86, "x86");
   DEF_REGISTER(      xmm7,   0x07 |  XMMS |   XMM | Arch_x86, "x86");
+  DEF_REGISTER(     mxcsr,   0x08 |  FULL |   XMM | Arch_x86, "x86");
 
   DEF_REGISTER(      ymm0,   0x00 |  YMMS |   YMM | Arch_x86, "x86");
   DEF_REGISTER(      ymm1,   0x01 |  YMMS |   YMM | Arch_x86, "x86");

diff --git a/common/src/registers/MachRegister.C b/common/src/registers/MachRegister.C
@@ -1101,7 +1101,7 @@ namespace Dyninst {
           case 36: return Dyninst::x86::mm7;
           case 37: return Dyninst::InvalidReg;
           case 38: return Dyninst::InvalidReg;
-//          case 39: return Dyninst::x86::mxcsr;
+          case 39: return Dyninst::x86::mxcsr;
           case 40: return Dyninst::x86::es;
           case 41: return Dyninst::x86::cs;
           case 42: return Dyninst::x86::ss;
@@ -1318,7 +1318,7 @@ namespace Dyninst {
           case 61: return Dyninst::InvalidReg;
           case 62: return Dyninst::x86_64::tr;
           case 63: return Dyninst::x86_64::ldtr;
-//          case 64: return Dyninst::x86_64::mxcsr;
+          case 64: return Dyninst::x86_64::mxcsr;
 //          case 65: return Dyninst::x86_64::fcw;
 //          case 66: return Dyninst::x86_64::fsw;
           case 67: return Dyninst::x86_64::xmm16;
@@ -1866,7 +1866,7 @@ namespace Dyninst {
           case Dyninst::x86::imm7: return 36;
           /*[37] Reserved */
           /*[38] Reserved */
-//          case Dyninst::x86::imxcsr: return 39;
+          case Dyninst::x86::imxcsr: return 39;
           case Dyninst::x86::ies: return 40;
           case Dyninst::x86::ics: return 41;
           case Dyninst::x86::iss: return 42;
@@ -2083,7 +2083,7 @@ namespace Dyninst {
           /*[61] Reserved */
           case Dyninst::x86_64::itr: return 62;
           case Dyninst::x86_64::ildtr: return 63;
-//          case Dyninst::x86_64::imxcsr: return 64;
+          case Dyninst::x86_64::imxcsr: return 64;
 //          case Dyninst::x86_64::ifcw: return 65;
 //          case Dyninst::x86_64::ifsw: return 66;
           case Dyninst::x86_64::ixmm16: return 67;