Added thumb mode support under GNU for module manager on Cortex-A7 pl…

…atform.

ports_module/cortex_a7/gnu/example_build/build_threadx_module_library.bat

@@ -98,21 +98,21 @@ arm-none-eabi-gcc -c -g -O0 -mcpu=cortex-a7 -mfloat-abi=hard -mfpu=neon-vfpv4 -m
 arm-none-eabi-gcc -c -g -O0 -mcpu=cortex-a7 -mfloat-abi=hard -mfpu=neon-vfpv4 -marm -mthumb-interwork -DTX_ENABLE_VFP_SUPPORT -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I../inc -I../../../../common/inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc ../../../../common_modules/module_lib/src/txm_trace_isr_exit_insert.c
 arm-none-eabi-gcc -c -g -O0 -mcpu=cortex-a7 -mfloat-abi=hard -mfpu=neon-vfpv4 -marm -mthumb-interwork -DTX_ENABLE_VFP_SUPPORT -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I../inc -I../../../../common/inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc ../../../../common_modules/module_lib/src/txm_trace_user_event_insert.c
 
-armar --create txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o
-armar -r txm.a txm_block_pool_prioritize.o txm_block_release.o
-armar -r txm.a txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o
-armar -r txm.a txm_byte_pool_prioritize.o txm_byte_release.o
-armar -r txm.a txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o
-armar -r txm.a txm_event_flags_set.o txm_event_flags_set_notify.o
-armar -r txm.a txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o
-armar -r txm.a txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o
-armar -r txm.a txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o
-armar -r txm.a txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o
-armar -r txm.a txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o
-armar -r txm.a txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o
-armar -r txm.a txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o
-armar -r txm.a txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o
-armar -r txm.a txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o
-armar -r txm.a txm_time_get.o txm_time_set.o
-armar -r txm.a txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o
-armar -r txm.a txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o
+arm-none-eabi-ar --create txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o
+arm-none-eabi-ar -r txm.a txm_block_pool_prioritize.o txm_block_release.o
+arm-none-eabi-ar -r txm.a txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o
+arm-none-eabi-ar -r txm.a txm_byte_pool_prioritize.o txm_byte_release.o
+arm-none-eabi-ar -r txm.a txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o
+arm-none-eabi-ar -r txm.a txm_event_flags_set.o txm_event_flags_set_notify.o
+arm-none-eabi-ar -r txm.a txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o
+arm-none-eabi-ar -r txm.a txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o
+arm-none-eabi-ar -r txm.a txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o
+arm-none-eabi-ar -r txm.a txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o
+arm-none-eabi-ar -r txm.a txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o
+arm-none-eabi-ar -r txm.a txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o
+arm-none-eabi-ar -r txm.a txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o
+arm-none-eabi-ar -r txm.a txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o
+arm-none-eabi-ar -r txm.a txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o
+arm-none-eabi-ar -r txm.a txm_time_get.o txm_time_set.o
+arm-none-eabi-ar -r txm.a txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o
+arm-none-eabi-ar -r txm.a txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o

ports_module/cortex_a7/gnu/example_build/crt0.S

@@ -1,15 +1,30 @@
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 /* .text is used instead of .section .text so it works with arm-aout too.  */
     .text
-    .code 32
     .align  0
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _mainCRTStartup
+_mainCRTStartup:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _start
+_start:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global start
 start:
-_start:
-_mainCRTStartup:
 
 /* Start by setting up a stack */
     /*  Set up the stack pointer to a fixed value */
@@ -68,17 +83,9 @@ _mainCRTStartup:
 .Lfini:
     .word   _fini
 #endif  */
+
     /* Return ...  */
-#ifdef __APCS_26__
-    movs    pc, lr
-#else
-#ifdef __THUMB_INTERWORK
     bx  lr
-#else
-    mov pc, lr
-#endif
-#endif
-
 
 /*  Workspace for Angel calls.  */
     .data

ports_module/cortex_a7/gnu/example_build/gcc_setup.S

@@ -1,10 +1,18 @@
 
+    .syntax unified
+#if !defined(THUMB_MODE)
+    .arm
+#else
+    .thumb
+#endif
+
     .text
     .align 4
-    .syntax unified
 
-    .global _gcc_setup
+#if defined(THUMB_MODE)
     .thumb_func
+#endif
+    .global _gcc_setup
 _gcc_setup:
 
     STMDB   sp!, {r3, r4, r5, r6, r7, lr}             // Store other preserved registers
@@ -93,7 +101,6 @@ got_setup_done:
 
   /* Startup helper functions. */
 
-    .thumb_func
 crt0_memory_copy:
 
     cmp     r0, r1
@@ -112,7 +119,6 @@ memory_copy_loop:
 memory_copy_done:
     bx      lr
 
-    .thumb_func
 crt0_memory_set:
     cmp     r0, r1
     beq     memory_set_done

ports_module/cortex_a7/gnu/example_build/tx_initialize_low_level.s

@@ -20,7 +20,12 @@
 /**************************************************************************/
 /**************************************************************************/
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
+#endif
 
 SVC_MODE        =       0xD3                    // Disable IRQ/FIQ SVC mode
 IRQ_MODE        =       0xD2                    // Disable IRQ/FIQ IRQ mode
@@ -39,24 +44,14 @@ THUMB_MASK      =       0x20                    // THUMB mode bit
     .global     _end
     .global     _sp
     .global     _stack_bottom
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_initialize_low_level for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_initialize_low_level
-    .type   $_tx_initialize_low_level,function
-$_tx_initialize_low_level:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_initialize_low_level         // Call _tx_initialize_low_level function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    .global     _tx_thread_fiq_context_save
+    .global     _tx_thread_fiq_context_restore
+#ifdef TX_ENABLE_FIQ_NESTING
+    .global     _tx_thread_fiq_nesting_start
+    .global     _tx_thread_fiq_nesting_end
+#endif
+#endif
 
     .text
     .align 2
@@ -65,7 +60,7 @@ $_tx_initialize_low_level:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_initialize_low_level                             ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.x          */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -101,8 +96,14 @@ $_tx_initialize_low_level:
 /*  09-30-2020     William E. Lamie         Initial Version 6.1           */
 /*  04-25-2022     Zhen Kong                Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  xx-xx-xxxx     Yajun Xia                Updated comments,             */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_initialize_low_level
     .type   _tx_initialize_low_level,function
 _tx_initialize_low_level:
@@ -155,28 +156,37 @@ _stack_error_loop:
     ADD     r1, r1, #8                          // Increment to next free word
     STR     r1, [r2]                            // Save first free memory address
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif
 
 /* Define shells for each of the interrupt vectors.  */
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global __tx_undefined
 __tx_undefined:
     B       __tx_undefined                      // Undefined handler
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global __tx_reserved_handler
 __tx_reserved_handler:
     B       __tx_reserved_handler               // Reserved exception handler
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global __tx_irq_handler
-    .global __tx_irq_processing_return
 __tx_irq_handler:
 
     /* Jump to context save to save system context.  */
     B       _tx_thread_context_save
+
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
+    .global __tx_irq_processing_return
 __tx_irq_processing_return:
 //
     /* At this point execution is still in the IRQ mode.  The CPSR, point of
@@ -245,12 +255,18 @@ __tx_irq_processing_return:
 
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  __tx_fiq_handler
-    .global  __tx_fiq_processing_return
 __tx_fiq_handler:
-asdf
     /* Jump to fiq context save to save system context.  */
     B       _tx_thread_fiq_context_save
+
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
+    .global  __tx_fiq_processing_return
 __tx_fiq_processing_return:
 
     /* At this point execution is still in the FIQ mode.  The CPSR, point of
@@ -279,6 +295,9 @@ __tx_fiq_processing_return:
 
 
 #else
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  __tx_fiq_handler
 __tx_fiq_handler:
     B       __tx_fiq_handler                    // FIQ interrupt handler
@@ -336,9 +355,15 @@ __tx_fiq_handler:
     // EXTERN  _tx_execution_thread_exit
     // EXTERN  _tx_thread_schedule
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  __tx_prefetch_handler
-    .global  __tx_abort_handler
 __tx_prefetch_handler:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
+    .global  __tx_abort_handler
 __tx_abort_handler:
     STMDB   sp!, {r0-r3}                        // Save some working registers
     LDR     r3, =_tx_thread_system_state        // Pickup address of system state var

ports_module/cortex_a7/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.12       */
+/*                                                           6.x          */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -56,6 +56,9 @@
 /*  07-29-2022      Scott Larson            Updated comments, removed     */
 /*                                            unneeded temp variable,     */
 /*                                            resulting in version 6.1.12 */
+/*  xx-xx-xxxx     Yajun Xia                Updated comments,             */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.x    */
 /*                                                                        */
 /**************************************************************************/
 
@@ -273,17 +276,9 @@ typedef unsigned short                          USHORT;
 /* Determine if the ARM architecture has the CLZ instruction. This is available on
    architectures v5 and above. If available, redefine the macro for calculating the
    lowest bit set.  */
-
-#if __TARGET_ARCH_ARM > 4
-
-#ifndef __thumb__
-
 #define TX_LOWEST_SET_BIT_CALCULATE(m, b)       m = m & ((ULONG) (-((LONG) m))); \
                                                 asm volatile (" CLZ  %0,%1 ": "=r" (b) : "r" (m) ); \
                                                 b = 31 - b;
-#endif
-#endif
-
 
 /* Define ThreadX interrupt lockout and restore macros for protection on
    access of critical kernel information.  The restore interrupt macro must
@@ -292,32 +287,39 @@ typedef unsigned short                          USHORT;
    is used to define a local function save area for the disable and restore
    macros.  */
 
-#ifdef __thumb__
-
-unsigned int   _tx_thread_interrupt_disable(void);
-unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
-
-
 #define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
-#define TX_DISABLE                              interrupt_save =  _tx_thread_interrupt_disable();
-#define TX_RESTORE                              _tx_thread_interrupt_restore(interrupt_save);
+#ifdef TX_ENABLE_FIQ_SUPPORT
 
-#else
+#define TX_DISABLE \
+    { \
+      asm volatile (" MRS %0,CPSR": "=r" (interrupt_save)); \
+      asm volatile (" CPSID if"); \
+    }
+#define TX_RESTORE \
+  { \
+    if ((interrupt_save & 0x40) == 0) \
+      asm volatile (" CPSIE f"); \
+    if ((interrupt_save & 0x80) == 0) \
+      asm volatile (" CPSIE i"); \
+  }
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
-#ifdef TX_ENABLE_FIQ_SUPPORT
-#define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
 #else
-#define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID i ": "=r" (interrupt_save) );
-#endif
 
-#define TX_RESTORE                              asm volatile (" MSR CPSR_c,%0 "::"r" (interrupt_save) );
+#define TX_DISABLE \
+  { \
+    asm volatile (" MRS %0,CPSR": "=r" (interrupt_save)); \
+    asm volatile (" CPSID i"); \
+  }
+#define TX_RESTORE \
+  { \
+    if ((interrupt_save & 0x80) == 0) \
+      asm volatile (" CPSIE i"); \
+  }
 
 #endif
 
-
 /* Define VFP extension for the ARMv7-A.  Each is assumed to be called in the context of the executing
    thread.  */