Skip to content

Commit

Permalink
Deprecate TR_X86OpCodes in favour of TR::InstOpCode::Mnemonic
Browse files Browse the repository at this point in the history
  • Loading branch information
fjeremic committed May 19, 2021
1 parent 23cc13b commit 3c6384e
Show file tree
Hide file tree
Showing 40 changed files with 721 additions and 723 deletions.
4 changes: 2 additions & 2 deletions compiler/x/amd64/codegen/OMRTreeEvaluator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -170,7 +170,7 @@ TR::Register *OMR::X86::AMD64::TreeEvaluator::i2lEvaluator(TR::Node *node, TR::C
// skipSignExtension flag is set by the optimizer with more global
// knowledge than the tree evaluator, so we will trust it.
//
TR_X86OpCodes regMemOpCode,regRegOpCode;
TR::InstOpCode::Mnemonic regMemOpCode,regRegOpCode;
if( node->isNonNegative()
|| (node->skipSignExtension() && performTransformation(comp, "TREE EVALUATION: skipping sign extension on node %s despite lack of isNonNegative\n", comp->getDebug()->getName(node))))
{
Expand Down Expand Up @@ -308,7 +308,7 @@ TR::Register *OMR::X86::AMD64::TreeEvaluator::lcmpEvaluator(TR::Node *node, TR::
return isNotEqualReg;
}

static TR::Register *l2fd(TR::Node *node, TR::RealRegister *target, TR_X86OpCodes opRegMem8, TR_X86OpCodes opRegReg8, TR::CodeGenerator *cg)
static TR::Register *l2fd(TR::Node *node, TR::RealRegister *target, TR::InstOpCode::Mnemonic opRegMem8, TR::InstOpCode::Mnemonic opRegReg8, TR::CodeGenerator *cg)
{
TR::Node *child = node->getFirstChild();
TR::MemoryReference *tempMR;
Expand Down
4 changes: 2 additions & 2 deletions compiler/x/amd64/objectfmt/OMRJitCodeRWXObjectFormat.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,7 @@ OMR::X86::AMD64::JitCodeRWXObjectFormat::emitFunctionCall(TR::FunctionCallData &
// Helper call
//
TR::X86ImmSymInstruction *callImmSym = NULL;
const TR_X86OpCodes op = data.useCall ? CALLImm4 : JMP4;
const TR::InstOpCode::Mnemonic op = data.useCall ? CALLImm4 : JMP4;

if (data.prevInstr)
{
Expand Down Expand Up @@ -184,7 +184,7 @@ OMR::X86::AMD64::JitCodeRWXObjectFormat::emitFunctionCall(TR::FunctionCallData &
data.out_materializeTargetAddressInstr = loadInstr;
}

const TR_X86OpCodes op = data.useCall ? CALLReg : JMPReg;
const TR::InstOpCode::Mnemonic op = data.useCall ? CALLReg : JMPReg;
if (data.prevInstr)
{
/**
Expand Down
50 changes: 25 additions & 25 deletions compiler/x/codegen/BinaryCommutativeAnalyser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@ zeroExtendTo32BitRegister(TR::Node *node,
int32_t sourceSize,
TR::CodeGenerator *cg)
{
TR_X86OpCodes op;
TR::InstOpCode::Mnemonic op;

switch (sourceSize)
{
Expand Down Expand Up @@ -86,9 +86,9 @@ zeroExtendTo32BitRegister(TR::Node *node,
void TR_X86BinaryCommutativeAnalyser::genericAnalyserWithExplicitOperands(TR::Node *root,
TR::Node *firstChild,
TR::Node *secondChild,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR_X86OpCodes copyOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
TR::InstOpCode::Mnemonic copyOpCode,
bool nonClobberingDestination) //false by default
{
TR_ASSERT(root->getOpCodeValue() == TR::OverflowCHK, "unsupported opcode %s for genericAnalyserWithExplicitOperands on node %p\n", _cg->comp()->getDebug()->getName(root->getOpCodeValue()), root);
Expand All @@ -103,9 +103,9 @@ void TR_X86BinaryCommutativeAnalyser::genericAnalyserWithExplicitOperands(TR::No
* this API is for regular operation nodes where the first child and second child are the operands by default
*/
void TR_X86BinaryCommutativeAnalyser::genericAnalyser(TR::Node *root,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR_X86OpCodes copyOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
TR::InstOpCode::Mnemonic copyOpCode,
bool nonClobberingDestination) //false by default
{
TR::Node *firstChild = NULL;
Expand Down Expand Up @@ -135,9 +135,9 @@ void TR_X86BinaryCommutativeAnalyser::genericAnalyser(TR::Node *root,
TR::Register* TR_X86BinaryCommutativeAnalyser::genericAnalyserImpl(TR::Node *root,
TR::Node *firstChild,
TR::Node *secondChild,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR_X86OpCodes copyOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
TR::InstOpCode::Mnemonic copyOpCode,
bool nonClobberingDestination)
{
TR::Register *targetRegister;
Expand Down Expand Up @@ -242,13 +242,13 @@ TR::Register* TR_X86BinaryCommutativeAnalyser::genericAnalyserImpl(TR::Node
}

void TR_X86BinaryCommutativeAnalyser::genericLongAnalyser(TR::Node *root,
TR_X86OpCodes lowRegRegOpCode,
TR_X86OpCodes highRegRegOpCode,
TR_X86OpCodes lowRegMemOpCode,
TR_X86OpCodes lowRegMemOpCode2Byte,
TR_X86OpCodes lowRegMemOpCode1Byte,
TR_X86OpCodes highRegMemOpCode,
TR_X86OpCodes copyOpCode)
TR::InstOpCode::Mnemonic lowRegRegOpCode,
TR::InstOpCode::Mnemonic highRegRegOpCode,
TR::InstOpCode::Mnemonic lowRegMemOpCode,
TR::InstOpCode::Mnemonic lowRegMemOpCode2Byte,
TR::InstOpCode::Mnemonic lowRegMemOpCode1Byte,
TR::InstOpCode::Mnemonic highRegMemOpCode,
TR::InstOpCode::Mnemonic copyOpCode)
{
TR::Node *firstChild;
TR::Node *secondChild;
Expand Down Expand Up @@ -704,8 +704,8 @@ void TR_X86BinaryCommutativeAnalyser::genericLongAnalyser(TR::Node *root,
* this API is intended for regular add operation nodes where the first child and second child are the operands by default
*/
void TR_X86BinaryCommutativeAnalyser::integerAddAnalyser(TR::Node *root,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
bool needsEflags, // false by default
TR::Node *carry )// 0 by default
{
Expand Down Expand Up @@ -743,8 +743,8 @@ void TR_X86BinaryCommutativeAnalyser::integerAddAnalyser(TR::Node *root,
void TR_X86BinaryCommutativeAnalyser::integerAddAnalyserWithExplicitOperands(TR::Node *root,
TR::Node *firstChild,
TR::Node *secondChild,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
bool needsEflags, // false by default
TR::Node *carry)// 0 by default
{
Expand All @@ -761,8 +761,8 @@ void TR_X86BinaryCommutativeAnalyser::integerAddAnalyserWithExplicitOperands(TR:
TR::Register *TR_X86BinaryCommutativeAnalyser::integerAddAnalyserImpl(TR::Node *root,
TR::Node *firstChild,
TR::Node *secondChild,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
bool needsEflags,
TR::Node *carry)
{
Expand Down Expand Up @@ -995,8 +995,8 @@ TR::Register* TR_X86BinaryCommutativeAnalyser::longAddAnalyserImpl(TR::Node *roo
TR::Register *oneLow = NULL;
TR::Register *oneHigh = NULL;
TR::Register *targetRegister = NULL;
TR_X86OpCodes regRegOpCode = ADD4RegReg;
TR_X86OpCodes regMemOpCode = ADD4RegMem;
TR::InstOpCode::Mnemonic regRegOpCode = ADD4RegReg;
TR::InstOpCode::Mnemonic regMemOpCode = ADD4RegMem;

TR::Register *firstRegister = firstChild->getRegister();
TR::Register *secondRegister = secondChild->getRegister();
Expand Down
44 changes: 22 additions & 22 deletions compiler/x/codegen/BinaryCommutativeAnalyser.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -57,53 +57,53 @@ class TR_X86BinaryCommutativeAnalyser : public TR_Analyser
void genericAnalyserWithExplicitOperands(TR::Node *root,
TR::Node *firstChild,
TR::Node *secondChild,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR_X86OpCodes copyOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
TR::InstOpCode::Mnemonic copyOpCode,
bool nonClobberingDestination = false);

void genericAnalyser(TR::Node *root,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR_X86OpCodes copyOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
TR::InstOpCode::Mnemonic copyOpCode,
bool nonClobberingDestination = false);

TR::Register *genericAnalyserImpl(TR::Node *root,
TR::Node *firstChild,
TR::Node *secondChild,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR_X86OpCodes copyOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
TR::InstOpCode::Mnemonic copyOpCode,
bool nonClobberingDestination);

void genericLongAnalyser(TR::Node *root,
TR_X86OpCodes lowRegRegOpCode,
TR_X86OpCodes highRegRegOpCode,
TR_X86OpCodes lowRegMemOpCode,
TR_X86OpCodes lowRegMemOpCode2Byte,
TR_X86OpCodes lowRegMemOpCode1Byte,
TR_X86OpCodes highRegMemOpCode,
TR_X86OpCodes copyOpCode);
TR::InstOpCode::Mnemonic lowRegRegOpCode,
TR::InstOpCode::Mnemonic highRegRegOpCode,
TR::InstOpCode::Mnemonic lowRegMemOpCode,
TR::InstOpCode::Mnemonic lowRegMemOpCode2Byte,
TR::InstOpCode::Mnemonic lowRegMemOpCode1Byte,
TR::InstOpCode::Mnemonic highRegMemOpCode,
TR::InstOpCode::Mnemonic copyOpCode);

void integerAddAnalyser(TR::Node *root,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
bool needsEflags = false,
TR::Node *carry = 0);// 0 by default

void integerAddAnalyserWithExplicitOperands(TR::Node *root,
TR::Node *firstChild,
TR::Node *secondChild,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
bool needsEflags = false,
TR::Node *carry = 0);

TR::Register* integerAddAnalyserImpl(TR::Node *root,
TR::Node *firstChild,
TR::Node *secondChild,
TR_X86OpCodes regRegOpCode,
TR_X86OpCodes regMemOpCode,
TR::InstOpCode::Mnemonic regRegOpCode,
TR::InstOpCode::Mnemonic regMemOpCode,
bool needsEflags,
TR::Node *carry);

Expand Down
12 changes: 6 additions & 6 deletions compiler/x/codegen/BinaryEvaluator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1778,7 +1778,7 @@ TR::Register *OMR::X86::TreeEvaluator::integerMulEvaluator(TR::Node *node, TR::C
// are evaluated by the generic analyser call below
if (targetRegister == 0 && IS_32BIT_SIGNED(value) && (dataType != TR::Int8)) // decomposition failed
{
TR_X86OpCodes opCode = BADIA32Op;
TR::InstOpCode::Mnemonic opCode = BADIA32Op;

if (firstChild->getReferenceCount() > 1 ||
firstChild->getRegister() != 0)
Expand Down Expand Up @@ -2275,7 +2275,7 @@ TR::Register *OMR::X86::TreeEvaluator::signedIntegerDivOrRemAnalyser(TR::Node *n
}
else
{
TR_X86OpCodes opCode;
TR::InstOpCode::Mnemonic opCode;
if (dvalue >= -128 && dvalue <= 127)
{
opCode = IMULRegRegImms(nodeIs64Bit);
Expand Down Expand Up @@ -2470,7 +2470,7 @@ TR::Register *OMR::X86::TreeEvaluator::integerDivOrRemEvaluator(TR::Node *node,
TR_ASSERT(0, "Shouldn't get here");
}

TR::X86RegInstruction *OMR::X86::TreeEvaluator::generateRegisterShift(TR::Node *node, TR_X86OpCodes immShiftOpCode, TR_X86OpCodes regShiftOpCode,TR::CodeGenerator *cg)
TR::X86RegInstruction *OMR::X86::TreeEvaluator::generateRegisterShift(TR::Node *node, TR::InstOpCode::Mnemonic immShiftOpCode, TR::InstOpCode::Mnemonic regShiftOpCode,TR::CodeGenerator *cg)
{
bool nodeIs64Bit = TR::TreeEvaluator::getNodeIs64Bit(node, cg);
TR::Register *targetRegister = NULL;
Expand Down Expand Up @@ -2581,7 +2581,7 @@ TR::X86RegInstruction *OMR::X86::TreeEvaluator::generateRegisterShift(TR::Node
return instr;
}

TR::X86MemInstruction *OMR::X86::TreeEvaluator::generateMemoryShift(TR::Node *node, TR_X86OpCodes immShiftOpCode, TR_X86OpCodes regShiftOpCode, TR::CodeGenerator *cg)
TR::X86MemInstruction *OMR::X86::TreeEvaluator::generateMemoryShift(TR::Node *node, TR::InstOpCode::Mnemonic immShiftOpCode, TR::InstOpCode::Mnemonic regShiftOpCode, TR::CodeGenerator *cg)
{
TR_ASSERT(node->isDirectMemoryUpdate(), "assertion failure");

Expand Down Expand Up @@ -3385,7 +3385,7 @@ TR::Register *OMR::X86::TreeEvaluator::sushrEvaluator(TR::Node *node, TR::CodeGe
return targetRegister;
}

TR_X86OpCodes OMR::X86::TreeEvaluator::_logicalOpPackage[numLogicalOpPackages][numLogicalOpForms] =
TR::InstOpCode::Mnemonic OMR::X86::TreeEvaluator::_logicalOpPackage[numLogicalOpPackages][numLogicalOpForms] =
{
// band
{ AND1RegReg, AND1RegMem, MOV1RegReg, AND1RegImm1, BADIA32Op,
Expand Down Expand Up @@ -3427,7 +3427,7 @@ TR_X86OpCodes OMR::X86::TreeEvaluator::_logicalOpPackage[numLogicalOpPackages][n


TR::Register *OMR::X86::TreeEvaluator::logicalEvaluator(TR::Node *node,
TR_X86OpCodes package[],
TR::InstOpCode::Mnemonic package[],
TR::CodeGenerator *cg)
{
bool nodeIs64Bit = TR::TreeEvaluator::getNodeIs64Bit(node, cg);
Expand Down

0 comments on commit 3c6384e

Please sign in to comment.