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Convert RegisterDependencyGroup to an extensible class on ARM
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Repeat the exercise from Z on ARM.
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@fjeremic
fjeremic committed May 11, 2021
1 parent b45d152 commit 85b7630
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Showing 5 changed files with 103 additions and 147 deletions.
2 changes: 1 addition & 1 deletion compiler/arm/codegen/ARMDebug.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -257,7 +257,7 @@ TR_Debug::print(TR::FILE *pOutFile, TR::Instruction * instr)

void
TR_Debug::dumpDependencyGroup(TR::FILE * pOutFile,
TR_ARMRegisterDependencyGroup *group,
TR::RegisterDependencyGroup *group,
int32_t numConditions,
char *prefix,
bool omitNullDependencies)
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73 changes: 70 additions & 3 deletions compiler/arm/codegen/OMRRegisterDependency.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,15 @@
#include "il/Node.hpp"
#include "il/Node_inlines.hpp"

OMR::ARM::RegisterDependencyConditions::RegisterDependencyConditions(uint8_t numPreConds, uint8_t numPostConds, TR_Memory * m)
: _preConditions(new (numPreConds, m) TR::RegisterDependencyGroup),
_postConditions(new (numPostConds, m) TR::RegisterDependencyGroup),
_numPreConditions(numPreConds),
_addCursorForPre(0),
_numPostConditions(numPostConds),
_addCursorForPost(0)
{}

OMR::ARM::RegisterDependencyConditions::RegisterDependencyConditions( TR::Node *node,
uint32_t extranum,
TR::Instruction **cursorPtr,
Expand Down Expand Up @@ -64,8 +73,8 @@ OMR::ARM::RegisterDependencyConditions::RegisterDependencyConditions( TR::Node

totalNum = totalNum + numLongs;

_preConditions = TR_ARMRegisterDependencyGroup::create(totalNum, cg->trMemory());
_postConditions = TR_ARMRegisterDependencyGroup::create(totalNum, cg->trMemory());
_preConditions = new (totalNum, cg->trMemory()) TR::RegisterDependencyGroup;
_postConditions = new (totalNum, cg->trMemory()) TR::RegisterDependencyGroup;
_numPreConditions = totalNum;
_addCursorForPre = 0;
_numPostConditions = totalNum;
Expand Down Expand Up @@ -317,7 +326,7 @@ void OMR::ARM::RegisterDependencyConditions::incRegisterTotalUseCounts(TR::CodeG
}
}

void TR_ARMRegisterDependencyGroup::assignRegisters(TR::Instruction *currentInstruction,
void OMR::ARM::RegisterDependencyGroup::assignRegisters(TR::Instruction *currentInstruction,
TR_RegisterKinds kindToBeAssigned,
uint32_t numberOfRegisters,
TR::CodeGenerator *cg)
Expand Down Expand Up @@ -657,3 +666,61 @@ void OMR::ARM::RegisterDependencyConditions::unionNoRegPostCondition(TR::Registe
{
addPostCondition(reg, TR::RealRegister::NoReg);
}

void OMR::ARM::RegisterDependencyConditions::addPreCondition(TR::Register *vr, TR::RealRegister::RegNum rr, uint8_t flag)
{
_preConditions->setDependencyInfo(_addCursorForPre++, vr, rr, flag);
}

void OMR::ARM::RegisterDependencyConditions::addPostCondition(TR::Register *vr, TR::RealRegister::RegNum rr, uint8_t flag)
{
_postConditions->setDependencyInfo(_addCursorForPost++, vr, rr, flag);
}

void OMR::ARM::RegisterDependencyConditions::assignPreConditionRegisters(TR::Instruction *currentInstruction, TR_RegisterKinds kindToBeAssigned, TR::CodeGenerator *cg)
{
if (_preConditions != NULL)
{
_preConditions->assignRegisters(currentInstruction, kindToBeAssigned, _addCursorForPre, cg);
}
}

void OMR::ARM::RegisterDependencyConditions::assignPostConditionRegisters(TR::Instruction *currentInstruction, TR_RegisterKinds kindToBeAssigned, TR::CodeGenerator *cg)
{
if (_postConditions != NULL)
{
_postConditions->assignRegisters(currentInstruction, kindToBeAssigned, _addCursorForPost, cg);
}
}

TR::Register *OMR::ARM::RegisterDependencyConditions::searchPreConditionRegister(TR::RealRegister::RegNum rr)
{
return(_preConditions==NULL?NULL:_preConditions->searchForRegister(rr, _addCursorForPre));
}

TR::Register *OMR::ARM::RegisterDependencyConditions::searchPostConditionRegister(TR::RealRegister::RegNum rr)
{
return(_postConditions==NULL?NULL:_postConditions->searchForRegister(rr, _addCursorForPost));
}

uint32_t OMR::ARM::RegisterDependencyConditions::setNumPreConditions(uint8_t n, TR_Memory * m)
{
if (_preConditions == NULL)
_preConditions = new (n, m) TR::RegisterDependencyGroup;

if (_addCursorForPre > n)
_addCursorForPre = n;

return (_numPreConditions = n);
}

uint32_t OMR::ARM::RegisterDependencyConditions::setNumPostConditions(uint8_t n, TR_Memory * m)
{
if (_postConditions == NULL)
_postConditions = new (n, m) TR::RegisterDependencyGroup;

if (_addCursorForPost > n)
_addCursorForPost = n;

return (_numPostConditions = n);
}
166 changes: 25 additions & 141 deletions compiler/arm/codegen/OMRRegisterDependency.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,12 @@
#error OMR::ARM::RegisterDependencyConditions expected to be a primary connector, but a OMR connector is already defined
#endif

#ifndef OMR_REGISTER_DEPENDENCY_GROUP_CONNECTOR
#define OMR_REGISTER_DEPENDENCY_GROUP_CONNECTOR
namespace OMR { namespace ARM { class RegisterDependencyGroup; } }
namespace OMR { typedef OMR::ARM::RegisterDependencyGroup RegisterDependencyGroupConnector; }
#endif

#include "compiler/codegen/OMRRegisterDependency.hpp"

#include "codegen/CodeGenerator.hpp"
Expand All @@ -43,90 +49,21 @@

namespace TR { class Register; }

#define NUM_DEFAULT_DEPENDENCIES 1

class TR_ARMRegisterDependencyGroup
namespace OMR
{
namespace ARM
{
class RegisterDependencyGroup : public OMR::RegisterDependencyGroup
{
TR::RegisterDependency _dependencies[NUM_DEFAULT_DEPENDENCIES];

// Use TR_ARMRegisterDependencyGroup::create to allocate an object of this type
//
void * operator new(size_t s, int32_t numDependencies, TR_Memory * m)
{
TR_ASSERT(numDependencies > 0, "operator new called with numDependencies == 0");
if (numDependencies > NUM_DEFAULT_DEPENDENCIES)
{
s += (numDependencies-NUM_DEFAULT_DEPENDENCIES)*sizeof(TR::RegisterDependency);
}
return m->allocateHeapMemory(s);
}

public:

TR_ALLOC_WITHOUT_NEW(TR_Memory::ARMRegisterDependencyGroup)

TR_ARMRegisterDependencyGroup() {}

static TR_ARMRegisterDependencyGroup *create(int32_t numDependencies, TR_Memory * m)
{
return numDependencies ? new (numDependencies, m) TR_ARMRegisterDependencyGroup : 0;
}

TR::RegisterDependency *getRegisterDependency(uint32_t index)
{
return &_dependencies[index];
}

void setDependencyInfo(uint32_t index,
TR::Register *vr,
TR::RealRegister::RegNum rr,
uint8_t flag)
{
_dependencies[index].setRegister(vr);
_dependencies[index].assignFlags(flag);
_dependencies[index].setRealRegister(rr);
}

TR::Register *searchForRegister(TR::RealRegister::RegNum rr, uint32_t numberOfRegisters)
{
for (uint32_t i=0; i<numberOfRegisters; i++)
{
if (_dependencies[i].getRealRegister() == rr)
return(_dependencies[i].getRegister());
}
return(NULL);
}

void assignRegisters(TR::Instruction *currentInstruction,
TR_RegisterKinds kindToBeAssigned,
uint32_t numberOfRegisters,
TR::CodeGenerator *cg);

void blockRegisters(uint32_t numberOfRegisters)
{
for (uint32_t i = 0; i < numberOfRegisters; i++)
{
_dependencies[i].getRegister()->block();
}
}

void unblockRegisters(uint32_t numberOfRegisters)
{
for (uint32_t i = 0; i < numberOfRegisters; i++)
{
_dependencies[i].getRegister()->unblock();
}
}
void assignRegisters(TR::Instruction *currentInstruction, TR_RegisterKinds kindToBeAssigned, uint32_t numberOfRegisters, TR::CodeGenerator *cg);
};

namespace OMR
{
namespace ARM
{
class RegisterDependencyConditions: public OMR::RegisterDependencyConditions
{
TR_ARMRegisterDependencyGroup *_preConditions;
TR_ARMRegisterDependencyGroup *_postConditions;
TR::RegisterDependencyGroup *_preConditions;
TR::RegisterDependencyGroup *_postConditions;
uint8_t _numPreConditions;
uint8_t _addCursorForPre;
uint8_t _numPostConditions;
Expand All @@ -144,14 +81,7 @@ class RegisterDependencyConditions: public OMR::RegisterDependencyConditions
_addCursorForPost(0)
{}

RegisterDependencyConditions(uint8_t numPreConds, uint8_t numPostConds, TR_Memory * m)
: _preConditions(TR_ARMRegisterDependencyGroup::create(numPreConds, m)),
_postConditions(TR_ARMRegisterDependencyGroup::create(numPostConds, m)),
_numPreConditions(numPreConds),
_addCursorForPre(0),
_numPostConditions(numPostConds),
_addCursorForPost(0)
{}
RegisterDependencyConditions(uint8_t numPreConds, uint8_t numPostConds, TR_Memory * m);

RegisterDependencyConditions(TR::Node *node,
uint32_t extranum,
Expand All @@ -163,81 +93,35 @@ class RegisterDependencyConditions: public OMR::RegisterDependencyConditions

void unionNoRegPostCondition(TR::Register *reg, TR::CodeGenerator *cg); /* @@@@ */

TR_ARMRegisterDependencyGroup *getPreConditions() {return _preConditions;}
TR::RegisterDependencyGroup *getPreConditions() {return _preConditions;}

uint32_t getNumPreConditions() {return _numPreConditions;}

uint32_t setNumPreConditions(uint8_t n, TR_Memory * m)
{
if (_preConditions == NULL)
_preConditions = TR_ARMRegisterDependencyGroup::create(n, m);

if (_addCursorForPre > n)
_addCursorForPre = n;

return (_numPreConditions = n);
}
uint32_t setNumPreConditions(uint8_t n, TR_Memory * m);

uint32_t getNumPostConditions() {return _numPostConditions;}

uint32_t setNumPostConditions(uint8_t n, TR_Memory * m)
{
if (_postConditions == NULL)
_postConditions = TR_ARMRegisterDependencyGroup::create(n, m);

if (_addCursorForPost > n)
_addCursorForPost = n;

return (_numPostConditions = n);
}
uint32_t setNumPostConditions(uint8_t n, TR_Memory * m);

uint32_t getAddCursorForPre() {return _addCursorForPre;}
uint32_t setAddCursorForPre(uint8_t a) {return (_addCursorForPre = a);}

uint32_t getAddCursorForPost() {return _addCursorForPost;}
uint32_t setAddCursorForPost(uint8_t a) {return (_addCursorForPost = a);}

void addPreCondition(TR::Register *vr,
TR::RealRegister::RegNum rr,
uint8_t flag = UsesDependentRegister)
{
_preConditions->setDependencyInfo(_addCursorForPre++, vr, rr, flag);
}
void addPreCondition(TR::Register *vr, TR::RealRegister::RegNum rr, uint8_t flag = UsesDependentRegister);

TR_ARMRegisterDependencyGroup *getPostConditions() {return _postConditions;}
TR::RegisterDependencyGroup *getPostConditions() {return _postConditions;}

void addPostCondition(TR::Register *vr,
TR::RealRegister::RegNum rr,
uint8_t flag = UsesDependentRegister)
{
_postConditions->setDependencyInfo(_addCursorForPost++, vr, rr, flag);
}
void addPostCondition(TR::Register *vr, TR::RealRegister::RegNum rr, uint8_t flag = UsesDependentRegister);

void assignPreConditionRegisters(TR::Instruction *currentInstruction, TR_RegisterKinds kindToBeAssigned, TR::CodeGenerator *cg)
{
if (_preConditions != NULL)
{
_preConditions->assignRegisters(currentInstruction, kindToBeAssigned, _addCursorForPre, cg);
}
}
void assignPreConditionRegisters(TR::Instruction *currentInstruction, TR_RegisterKinds kindToBeAssigned, TR::CodeGenerator *cg);

void assignPostConditionRegisters(TR::Instruction *currentInstruction, TR_RegisterKinds kindToBeAssigned, TR::CodeGenerator *cg)
{
if (_postConditions != NULL)
{
_postConditions->assignRegisters(currentInstruction, kindToBeAssigned, _addCursorForPost, cg);
}
}
void assignPostConditionRegisters(TR::Instruction *currentInstruction, TR_RegisterKinds kindToBeAssigned, TR::CodeGenerator *cg);

TR::Register *searchPreConditionRegister(TR::RealRegister::RegNum rr)
{
return(_preConditions==NULL?NULL:_preConditions->searchForRegister(rr, _addCursorForPre));
}
TR::Register *searchPreConditionRegister(TR::RealRegister::RegNum rr);

TR::Register *searchPostConditionRegister(TR::RealRegister::RegNum rr)
{
return(_postConditions==NULL?NULL:_postConditions->searchForRegister(rr, _addCursorForPost));
}
TR::Register *searchPostConditionRegister(TR::RealRegister::RegNum rr);

void stopAddingPreConditions()
{
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6 changes: 6 additions & 0 deletions compiler/arm/codegen/RegisterDependency.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,12 @@

namespace TR
{
class RegisterDependencyGroup : public OMR::RegisterDependencyGroupConnector
{
public:

RegisterDependencyGroup() : OMR::RegisterDependencyGroupConnector() {}
};

class RegisterDependencyConditions : public OMR::RegisterDependencyConditionsConnector
{
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3 changes: 1 addition & 2 deletions compiler/ras/Debug.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -248,7 +248,6 @@ namespace TR { class ARMMonitorEnterSnippet; }
namespace TR { class ARMMonitorExitSnippet; }
namespace TR { class ARMStackCheckFailureSnippet; }
namespace TR { class ARMRecompilationSnippet; }
class TR_ARMRegisterDependencyGroup;

namespace TR { class S390LabelInstruction; }
namespace TR { class S390BranchInstruction; }
Expand Down Expand Up @@ -964,7 +963,7 @@ class TR_Debug
char * fullOpCodeName(TR::Instruction *instr);
void printPrefix(TR::FILE *, TR::Instruction *);
void printBinaryPrefix(char *prefixBuffer, TR::Instruction *);
void dumpDependencyGroup(TR::FILE *pOutFile, TR_ARMRegisterDependencyGroup *group, int32_t numConditions, char *prefix, bool omitNullDependencies);
void dumpDependencyGroup(TR::FILE *pOutFile, TR::RegisterDependencyGroup *group, int32_t numConditions, char *prefix, bool omitNullDependencies);
void dumpDependencies(TR::FILE *, TR::Instruction *);
void print(TR::FILE *, TR::ARMLabelInstruction *);
#ifdef J9_PROJECT_SPECIFIC
Expand Down

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