Convert RegisterDependencyGroup to an extensible class on Z

We migrate all the code from the Z `TR_S390RegisterDependencyGroup` into
an extensible `RegisterDependencyGroup` class. Then we create an
extension of this class in the Z codegen to implement some codegen
specific APIs.

compiler/codegen/OMRRegisterDependency.hpp

@@ -31,12 +31,139 @@
    namespace OMR { typedef OMR::RegisterDependencyConditions RegisterDependencyConditionsConnector; }
 #endif
 
+#ifndef OMR_REGISTER_DEPENDENCY_GROUP_CONNECTOR
+#define OMR_REGISTER_DEPENDENCY_GROUP_CONNECTOR
+namespace OMR { class RegisterDependencyGroup; }
+namespace OMR { typedef OMR::RegisterDependencyGroup RegisterDependencyGroupConnector; }
+#endif
+
 #include "env/TRMemory.hpp"
 #include "codegen/RegisterDependencyStruct.hpp"
 
 namespace OMR
 {
 
+class OMR_EXTENSIBLE RegisterDependencyGroup
+   {
+   public:
+
+   TR_ALLOC_WITHOUT_NEW(TR_Memory::RegisterDependencyGroup)
+
+   RegisterDependencyGroup() {}
+
+   void *operator new(size_t s, int32_t numDependencies, TR_Memory *m)
+      {
+      if (numDependencies > NUM_DEFAULT_DEPENDENCIES)
+         {
+         s += (numDependencies - NUM_DEFAULT_DEPENDENCIES) * sizeof(TR::RegisterDependency);
+         }
+
+      return m->allocateHeapMemory(s, TR_MemoryBase::RegisterDependencyGroup);
+      }
+
+   TR::RegisterDependency *getRegisterDependency(uint32_t index)
+      {
+      return &_dependencies[index];
+      }
+
+   void clearDependencyInfo(uint32_t index)
+      {
+      _dependencies[index].setRegister(NULL);
+      _dependencies[index].assignFlags(0);
+      _dependencies[index].setRealRegister(TR::RealRegister::NoReg);
+      }
+
+   void setDependencyInfo(uint32_t index, TR::Register *vr, TR::RealRegister::RegDep rr, uint8_t flag)
+     {
+     setDependencyInfo(index, vr, static_cast<TR::RealRegister::RegNum>(rr), flag);
+     }
+
+   void setDependencyInfo(uint32_t index, TR::Register *vr, TR::RealRegister::RegNum rr, uint8_t flag)
+      {
+      _dependencies[index].setRegister(vr);
+      _dependencies[index].assignFlags(flag);
+      _dependencies[index].setRealRegister(rr);
+      }
+
+   TR::Register *searchForRegister(TR::Register* vr, uint8_t flag, uint32_t numberOfRegisters, TR::CodeGenerator *cg)
+      {
+      for (auto i = 0; i < numberOfRegisters; ++i)
+         {
+         if (_dependencies[i].getRegister() == vr && (_dependencies[i].getFlags() & flag))
+            return _dependencies[i].getRegister();
+         }
+
+      return NULL;
+      }
+
+   TR::Register *searchForRegister(TR::RealRegister::RegNum rr, uint8_t flag, uint32_t numberOfRegisters, TR::CodeGenerator *cg)
+      {
+      for (auto i = 0; i < numberOfRegisters; ++i)
+         {
+         if (_dependencies[i].getRealRegister() == rr && (_dependencies[i].getFlags() & flag))
+            return _dependencies[i].getRegister();
+         }
+
+      return NULL;
+      }
+
+   int32_t searchForRegisterPos(TR::Register* vr, uint8_t flag, uint32_t numberOfRegisters, TR::CodeGenerator *cg)
+      {
+      for (auto i = 0; i < numberOfRegisters; ++i)
+         {
+         if (_dependencies[i].getRegister() == vr && (_dependencies[i].getFlags() & flag))
+            return i;
+         }
+
+      return -1;
+      }
+
+   void setRealRegisterForDependency(int32_t index, TR::RealRegister::RegNum regNum)
+      {
+      _dependencies[index].setRealRegister(regNum);
+      }
+
+   void blockRegisters(uint32_t numberOfRegisters, TR::CodeGenerator *cg)
+      {
+      for (auto i = 0; i < numberOfRegisters; ++i)
+         {
+         if (_dependencies[i].getRegister())
+            {
+            _dependencies[i].getRegister()->block();
+            }
+         }
+      }
+
+   void unblockRegisters(uint32_t numberOfRegisters, TR::CodeGenerator *cg)
+      {
+      for (auto i = 0; i < numberOfRegisters; ++i)
+         {
+         if (_dependencies[i].getRegister())
+            {
+            _dependencies[i].getRegister()->unblock();
+            }
+         }
+      }
+
+   void stopUsingDepRegs(uint32_t numberOfRegisters, TR::Register *ret1, TR::Register *ret2, TR::CodeGenerator *cg)
+      {
+      for (auto i = 0; i < numberOfRegisters; ++i)
+         {
+         auto depReg = _dependencies[i].getRegister();
+         if (depReg != ret1 && depReg != ret2)
+            {
+            cg->stopUsingRegister(depReg);
+            }
+         }
+      }
+
+   protected:
+
+   static const size_t NUM_DEFAULT_DEPENDENCIES = 1;
+
+   TR::RegisterDependency _dependencies[NUM_DEFAULT_DEPENDENCIES];
+   };
+
 class RegisterDependencyConditions
    {
    protected:

compiler/codegen/RegisterDependency.hpp

@@ -26,6 +26,14 @@
 
 namespace TR
 {
+class RegisterDependencyGroup : public OMR::RegisterDependencyGroupConnector
+   {
+   public:
+
+   RegisterDependencyGroup() :
+      OMR::RegisterDependencyGroupConnector() {}
+   };
+
 class RegisterDependencyConditions : public OMR::RegisterDependencyConditionsConnector
    {
    public:

compiler/ras/Debug.hpp

@@ -93,6 +93,7 @@ namespace TR { class OptionSet; }
 namespace TR { class Options; }
 namespace TR { class RealRegister; }
 namespace TR { class Register; }
+namespace TR { class RegisterDependencyGroup; }
 namespace TR { class RegisterDependency; }
 namespace TR { class RegisterDependencyConditions; }
 namespace TR { class RegisterMappedSymbol; }
@@ -317,7 +318,6 @@ namespace TR { class S390JNICallDataSnippet; }
 
 namespace TR { class S390StackCheckFailureSnippet; }
 namespace TR { class S390HeapAllocSnippet; }
-class TR_S390RegisterDependencyGroup;
 namespace TR { class S390RRSInstruction; }
 namespace TR { class S390RIEInstruction; }
 namespace TR { class S390RISInstruction; }
@@ -638,7 +638,7 @@ class TR_Debug
    void print(TR::FILE *, TR::ARMHelperCallSnippet *);
 #endif
 #if defined(TR_TARGET_S390)
-   virtual void printRegisterDependencies(TR::FILE *pOutFile, TR_S390RegisterDependencyGroup *rgd, int numberOfRegisters);
+   virtual void printRegisterDependencies(TR::FILE *pOutFile, TR::RegisterDependencyGroup *rgd, int numberOfRegisters);
    const char * getName(TR::RealRegister *, TR_RegisterSizes size = TR_WordReg);
 #endif
 #if defined(TR_TARGET_ARM64)

compiler/z/codegen/OMRInstruction.cpp

@@ -791,7 +791,7 @@ OMR::Z::Instruction::assignRegisters(TR_RegisterKinds kindToBeAssigned)
 
       // Step 2 : loop through and set up the new associations (both on the machine and by associating the virtual
       // registers with their real dependencies)
-         TR_S390RegisterDependencyGroup * depGroup = self()->getDependencyConditions()->getPostConditions();
+         TR::RegisterDependencyGroup * depGroup = self()->getDependencyConditions()->getPostConditions();
          for (int32_t j = 0; j < last; ++j)
             {
             TR::Register * virtReg = depGroup->getRegisterDependency(j)->getRegister();
@@ -1548,8 +1548,8 @@ OMR::Z::Instruction::renameRegister(TR::Register *from, TR::Register *to)
   TR::RegisterDependencyConditions *conds = self()->getDependencyConditions();
   if (conds)
     {
-    TR_S390RegisterDependencyGroup *preConds = conds->getPreConditions();
-    TR_S390RegisterDependencyGroup *postConds = conds->getPostConditions();
+    TR::RegisterDependencyGroup *preConds = conds->getPreConditions();
+    TR::RegisterDependencyGroup *postConds = conds->getPostConditions();
 
     n = conds->getNumPreConditions();
     for (i = 0; i < n; i++)
@@ -1904,8 +1904,8 @@ OMR::Z::Instruction::setUseDefRegisters(bool updateDependencies)
       TR::Register *tempRegister;
       if ((dependencies!=NULL) && ((self()->getOpCode().getOpCodeValue() == TR::InstOpCode::DEPEND)))
          {
-         TR_S390RegisterDependencyGroup *preConditions  = dependencies->getPreConditions();
-         TR_S390RegisterDependencyGroup *postConditions = dependencies->getPostConditions();
+         TR::RegisterDependencyGroup *preConditions  = dependencies->getPreConditions();
+         TR::RegisterDependencyGroup *postConditions = dependencies->getPostConditions();
          if (preConditions!=NULL)
             {
             for (i = 0; i < dependencies->getNumPreConditions(); i++)

compiler/z/codegen/OMRInstruction.hpp

@@ -49,7 +49,6 @@ namespace OMR { typedef OMR::Z::Instruction InstructionConnector; }
 
 class TR_Debug;
 namespace TR { class S390ImmInstruction; }
-class TR_S390RegisterDependencyGroup;
 namespace TR { class CodeGenerator; }
 namespace TR { class Instruction; }
 namespace TR { class MemoryReference; }

compiler/z/codegen/OMRMemoryReference.cpp

@@ -2331,7 +2331,7 @@ OMR::Z::MemoryReference::propagateAlignmentInfo(OMR::Z::MemoryReference *newMemR
  * 4 different kids of assignRegisters:
  *      1. TR::Instruction::assignRegisters
  *      2. TR_OutOfLineCodeSection::assignRegisters
- *      3. TR_S390RegisterDependencyGroup::assignRegisters
+ *      3. TR::RegisterDependencyGroup::assignRegisters
  *      4. OMR::Z::MemoryReference::assignRegisters
  *          TR::Instruction::assignRegisters calls this
  */

compiler/z/codegen/OMRRegister.hpp

@@ -84,9 +84,6 @@ class OMR_EXTENSIBLE Register: public OMR::Register
    bool is64BitReg();
    void setIs64BitReg(bool b = true);
 
-   bool isDependencySet()    {return _flags.testAny(DependencySet);}
-   void setDependencySet(bool v) {if (v) _flags.set(DependencySet);}
-
    bool alreadySignExtended()           {return _flags.testAny(AlreadySignExtended);}
    void setAlreadySignExtended()        {_flags.set(AlreadySignExtended);}
    void resetAlreadySignExtended()      {_flags.reset(AlreadySignExtended);}
@@ -120,7 +117,6 @@ class OMR_EXTENSIBLE Register: public OMR::Register
       {
          IsUsedInMemRef                = 0x0800, // 390 cannot associate GPR0 to regs used in memrefs
          Is64Bit                       = 0x0002, // 390 flag indicates that this Register contained a 64-bit value
-         DependencySet                 = 0x0200,  // 390 flag, post dependancy was assigned
 
          AlreadySignExtended           = 0x1000, // determine whether i2l should be nops
       };