tc77 finally works

eez-open · Aug 15, 2019 · 06fc817 · 06fc817
1 parent c3194a6
commit 06fc817
Show file tree

Hide file tree

Showing 2 changed files with 25 additions and 18 deletions.
diff --git a/src/eez/drivers/tc77.cpp b/src/eez/drivers/tc77.cpp
@@ -36,10 +36,11 @@ namespace drivers {
 namespace tc77 {
 
 float readTemperature(uint8_t slotIndex) {
+    uint8_t output[2] = { 0, 0 };
     uint8_t result[2];
 
     spi::select(slotIndex, spi::CHIP_TEMP_SENSOR);
-    spi::receive(slotIndex, result, 1);
+    spi::transfer(slotIndex, output, result, 2);
     spi::deselect(slotIndex);
 
     uint16_t adc = (((uint16_t)result[0]) << 8) | result[1];

diff --git a/src/eez/platform/stm32/spi.cpp b/src/eez/platform/stm32/spi.cpp
@@ -40,25 +40,31 @@ void select(uint8_t slotIndex, int chip) {
 
 	__HAL_SPI_DISABLE(spiHandle[slotIndex]);
 
-    if (chip == CHIP_IOEXP) {
-    	spiHandle[slotIndex]->Init.Direction = SPI_DIRECTION_2LINES;
+    // if (chip == CHIP_IOEXP ) {
+    // 	spiHandle[slotIndex]->Init.Direction = SPI_DIRECTION_2LINES;
+    //     WRITE_REG(spiHandle[slotIndex]->Instance->CR1, SPI_MODE_MASTER | SPI_DIRECTION_2LINES | SPI_POLARITY_LOW | SPI_PHASE_1EDGE | (SPI_NSS_SOFT & SPI_CR1_SSM) | SPI_BAUDRATEPRESCALER_16 | SPI_FIRSTBIT_MSB | SPI_CRCCALCULATION_DISABLE);
+
+	// 	spiHandle[slotIndex]->Init.DataSize = SPI_DATASIZE_8BIT;
+  	// 	WRITE_REG(spiHandle[slotIndex]->Instance->CR2, (((SPI_NSS_SOFT >> 16U) & SPI_CR2_SSOE) | SPI_TIMODE_DISABLE | SPI_NSS_PULSE_ENABLE | SPI_DATASIZE_8BIT) | SPI_RXFIFO_THRESHOLD_QF);
+    // } else if (chip == CHIP_TEMP_SENSOR) {
+    // 	spiHandle[slotIndex]->Init.Direction = SPI_DIRECTION_1LINE;
+    //     WRITE_REG(spiHandle[slotIndex]->Instance->CR1, SPI_MODE_MASTER | SPI_DIRECTION_1LINE  | SPI_POLARITY_LOW | SPI_PHASE_1EDGE | (SPI_NSS_SOFT & SPI_CR1_SSM) | SPI_BAUDRATEPRESCALER_32 | SPI_FIRSTBIT_MSB | SPI_CRCCALCULATION_DISABLE);
+
+	// 	spiHandle[slotIndex]->Init.DataSize = SPI_DATASIZE_16BIT;
+  	// 	WRITE_REG(spiHandle[slotIndex]->Instance->CR2, (((SPI_NSS_SOFT >> 16U) & SPI_CR2_SSOE) | SPI_TIMODE_DISABLE | SPI_NSS_PULSE_ENABLE | SPI_DATASIZE_16BIT) | SPI_RXFIFO_THRESHOLD_HF);
+	// } else {
+	// 	// ADC & DAC
+	// 	spiHandle[slotIndex]->Init.Direction = SPI_DIRECTION_2LINES;
+    //     WRITE_REG(spiHandle[slotIndex]->Instance->CR1, SPI_MODE_MASTER | SPI_DIRECTION_2LINES | SPI_POLARITY_LOW | SPI_PHASE_2EDGE | (SPI_NSS_SOFT & SPI_CR1_SSM) | SPI_BAUDRATEPRESCALER_16 | SPI_FIRSTBIT_MSB | SPI_CRCCALCULATION_DISABLE);
+
+	// 	spiHandle[slotIndex]->Init.DataSize = SPI_DATASIZE_8BIT;
+  	// 	WRITE_REG(spiHandle[slotIndex]->Instance->CR2, (((SPI_NSS_SOFT >> 16U) & SPI_CR2_SSOE) | SPI_TIMODE_DISABLE | SPI_NSS_PULSE_ENABLE | SPI_DATASIZE_8BIT) | SPI_RXFIFO_THRESHOLD_QF);
+    // }
+
+    if (chip == CHIP_IOEXP || chip == CHIP_TEMP_SENSOR) {
         WRITE_REG(spiHandle[slotIndex]->Instance->CR1, SPI_MODE_MASTER | SPI_DIRECTION_2LINES | SPI_POLARITY_LOW | SPI_PHASE_1EDGE | (SPI_NSS_SOFT & SPI_CR1_SSM) | SPI_BAUDRATEPRESCALER_16 | SPI_FIRSTBIT_MSB | SPI_CRCCALCULATION_DISABLE);
-
-		spiHandle[slotIndex]->Init.DataSize = SPI_DATASIZE_8BIT;
-  		WRITE_REG(spiHandle[slotIndex]->Instance->CR2, (((SPI_NSS_SOFT >> 16U) & SPI_CR2_SSOE) | SPI_TIMODE_DISABLE | SPI_NSS_PULSE_ENABLE | SPI_DATASIZE_8BIT) | SPI_RXFIFO_THRESHOLD_QF);
-    } else if (chip == CHIP_TEMP_SENSOR) {
-    	spiHandle[slotIndex]->Init.Direction = SPI_DIRECTION_1LINE;
-        WRITE_REG(spiHandle[slotIndex]->Instance->CR1, SPI_MODE_MASTER | SPI_DIRECTION_1LINE  | SPI_POLARITY_LOW | SPI_PHASE_1EDGE | (SPI_NSS_SOFT & SPI_CR1_SSM) | SPI_BAUDRATEPRESCALER_32 | SPI_FIRSTBIT_MSB | SPI_CRCCALCULATION_DISABLE);
-
-		spiHandle[slotIndex]->Init.DataSize = SPI_DATASIZE_16BIT;
-  		WRITE_REG(spiHandle[slotIndex]->Instance->CR2, (((SPI_NSS_SOFT >> 16U) & SPI_CR2_SSOE) | SPI_TIMODE_DISABLE | SPI_NSS_PULSE_ENABLE | SPI_DATASIZE_16BIT) | SPI_RXFIFO_THRESHOLD_HF);
-	} else {
-		// ADC & DAC
-		spiHandle[slotIndex]->Init.Direction = SPI_DIRECTION_2LINES;
+    } else {
         WRITE_REG(spiHandle[slotIndex]->Instance->CR1, SPI_MODE_MASTER | SPI_DIRECTION_2LINES | SPI_POLARITY_LOW | SPI_PHASE_2EDGE | (SPI_NSS_SOFT & SPI_CR1_SSM) | SPI_BAUDRATEPRESCALER_16 | SPI_FIRSTBIT_MSB | SPI_CRCCALCULATION_DISABLE);
-
-		spiHandle[slotIndex]->Init.DataSize = SPI_DATASIZE_8BIT;
-  		WRITE_REG(spiHandle[slotIndex]->Instance->CR2, (((SPI_NSS_SOFT >> 16U) & SPI_CR2_SSOE) | SPI_TIMODE_DISABLE | SPI_NSS_PULSE_ENABLE | SPI_DATASIZE_8BIT) | SPI_RXFIFO_THRESHOLD_QF);
     }
 
 	// __HAL_SPI_ENABLE(spiHandle[slotIndex]);