bios/linker: Place .data in sram with initial copy in rom.

[zyp]

As per #566, .data section is currently located in rom, rendering it read-only. This PR moves .data to sram, leaving initial state in rom that needs to be copied to sram during startup. This means that every crt0.S needs to be updated to fix this.

• vexriscv: Updated and tested.
• rocket: Updated and tested.
• serv: Updated and tested.
• blackparrot: Identical to rocket, not tested.
• cv32e40p: Identical to vexriscv, not tested.
• minerva: Identical to serv, not tested.
• picorv32: Existing copy code updated, not tested.
• lm32: Existing copy code updated, not tested.
• mor1kx: Still needs to be updated.
• microwatt: Still needs to be updated. Seems to also miss .bss initialization.

Fixes #566.

[gsomlo]

I get the above when building with

litex/litex/boards/targets/nexys4ddr.py --csr-data-width 32 --sys-clk-freq 75e6 \
    --with-ethernet --with-spi-sdcard --cpu-type rocket --cpu-variant linux \
    --integrated-rom-size=0x10000 --build

It eventually boots from either ethernet or sdcard, but the part where memtest results are printed out to the terminal is all scrambled (on the nexs4ddr).

[gsomlo]

works if sram is doubled to accomodate both .data and stack (current 0x1000 size is not enough for both). Suggest s/0x1000/0x2000/ here and here.

Tested on rocket (64bit) and nexys4ddr, works fine otherwise.

[enjoy-digital]

Thanks @zyp, @gsomlo. Let's keep #566 open to finish the work and do the changes on the mor1kx, microwatt.