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Merge branch 'double_buffer'
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@farhanrahman
farhanrahman committed Sep 3, 2012
2 parents 5d7c760 + c224674 commit 036b4d7
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Showing 23 changed files with 1,012 additions and 1,270 deletions.
Binary file modified flash/RiffaInt/RiffaInt/rev0/rev0.ace
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542 changes: 80 additions & 462 deletions ...t/base_systems/ml505/hdl/elaborate/clock_generator_0_v4_03_a/hdl/vhdl/clock_generator.vhd
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256 changes: 82 additions & 174 deletions project/base_systems/ml505/hdl/system.vhd
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Expand Up @@ -1002,53 +1002,20 @@ architecture STRUCTURE of system is
BUF_REQD_SIZE : out std_logic_vector(4 downto 0);
BUF_REQD_RDY : out std_logic;
BUF_REQD_ERR : out std_logic;
BRAM_Rst : out std_logic;
BRAM_Clk : out std_logic;
BRAM_EN : out std_logic;
BRAM_WEN : out std_logic_vector(0 to 3);
BRAM_Addr : out std_logic_vector(0 to 31);
BRAM_Din : in std_logic_vector(0 to 31);
BRAM_Dout : out std_logic_vector(0 to 31)
);
end component;

component system_riffa_example_0_wrapper is
port (
SYS_CLK : in std_logic;
SYS_RST : in std_logic;
INTERRUPT : out std_logic;
INTERRUPT_ERR : out std_logic;
INTERRUPT_ACK : in std_logic;
DOORBELL : in std_logic;
DOORBELL_ERR : in std_logic;
DOORBELL_LEN : in std_logic_vector(31 downto 0);
DOORBELL_ARG : in std_logic_vector(31 downto 0);
DMA_REQ : out std_logic;
DMA_REQ_ACK : in std_logic;
DMA_SRC : out std_logic_vector(31 downto 0);
DMA_DST : out std_logic_vector(31 downto 0);
DMA_LEN : out std_logic_vector(31 downto 0);
DMA_SIG : out std_logic;
DMA_DONE : in std_logic;
DMA_ERR : in std_logic;
BUF_REQ : out std_logic;
BUF_REQ_ACK : in std_logic;
BUF_REQ_ADDR : in std_logic_vector(31 downto 0);
BUF_REQ_SIZE : in std_logic_vector(4 downto 0);
BUF_REQ_RDY : in std_logic;
BUF_REQ_ERR : in std_logic;
BUF_REQD : in std_logic;
BUF_REQD_ADDR : out std_logic_vector(31 downto 0);
BUF_REQD_SIZE : out std_logic_vector(4 downto 0);
BUF_REQD_RDY : out std_logic;
BUF_REQD_ERR : out std_logic;
BRAM_Rst : out std_logic;
BRAM_Clk : out std_logic;
BRAM_EN : out std_logic;
BRAM_WEN : out std_logic_vector(0 to 3);
BRAM_Addr : out std_logic_vector(0 to 31);
BRAM_Din : in std_logic_vector(0 to 31);
BRAM_Dout : out std_logic_vector(0 to 31)
BRAM_Rst_0 : out std_logic;
BRAM_Clk_0 : out std_logic;
BRAM_EN_0 : out std_logic;
BRAM_WEN_0 : out std_logic_vector(0 to 3);
BRAM_Addr_0 : out std_logic_vector(0 to 31);
BRAM_Din_0 : in std_logic_vector(0 to 31);
BRAM_Dout_0 : out std_logic_vector(0 to 31);
BRAM_Rst_1 : out std_logic;
BRAM_Clk_1 : out std_logic;
BRAM_EN_1 : out std_logic;
BRAM_WEN_1 : out std_logic_vector(0 to 3);
BRAM_Addr_1 : out std_logic_vector(0 to 31);
BRAM_Din_1 : in std_logic_vector(0 to 31);
BRAM_Dout_1 : out std_logic_vector(0 to 31)
);
end component;

Expand Down Expand Up @@ -1229,13 +1196,20 @@ architecture STRUCTURE of system is
signal pgassign2 : std_logic_vector(0 to 0);
signal pgassign3 : std_logic_vector(0 to 0);
signal pgassign4 : std_logic_vector(0 to 0);
signal riffa_0_BRAMPORT_BRAM_Addr : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_BRAM_Clk : std_logic;
signal riffa_0_BRAMPORT_BRAM_Din : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_BRAM_Dout : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_BRAM_EN : std_logic;
signal riffa_0_BRAMPORT_BRAM_Rst : std_logic;
signal riffa_0_BRAMPORT_BRAM_WEN : std_logic_vector(0 to 3);
signal riffa_0_BRAMPORT_0_BRAM_Addr : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_0_BRAM_Clk : std_logic;
signal riffa_0_BRAMPORT_0_BRAM_Din : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_0_BRAM_Dout : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_0_BRAM_EN : std_logic;
signal riffa_0_BRAMPORT_0_BRAM_Rst : std_logic;
signal riffa_0_BRAMPORT_0_BRAM_WEN : std_logic_vector(0 to 3);
signal riffa_0_BRAMPORT_1_BRAM_Addr : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_1_BRAM_Clk : std_logic;
signal riffa_0_BRAMPORT_1_BRAM_Din : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_1_BRAM_Dout : std_logic_vector(0 to 31);
signal riffa_0_BRAMPORT_1_BRAM_EN : std_logic;
signal riffa_0_BRAMPORT_1_BRAM_Rst : std_logic;
signal riffa_0_BRAMPORT_1_BRAM_WEN : std_logic_vector(0 to 3);
signal riffa_0_CHANNEL_BUF_REQ : std_logic;
signal riffa_0_CHANNEL_BUF_REQD : std_logic;
signal riffa_0_CHANNEL_BUF_REQD_ADDR : std_logic_vector(31 downto 0);
Expand All @@ -1262,39 +1236,6 @@ architecture STRUCTURE of system is
signal riffa_0_CHANNEL_INTERRUPT : std_logic;
signal riffa_0_CHANNEL_INTERRUPT_ACK : std_logic;
signal riffa_0_CHANNEL_INTERRUPT_ERR : std_logic;
signal riffa_example_0_BRAMPORT_BRAM_Addr : std_logic_vector(0 to 31);
signal riffa_example_0_BRAMPORT_BRAM_Clk : std_logic;
signal riffa_example_0_BRAMPORT_BRAM_Din : std_logic_vector(0 to 31);
signal riffa_example_0_BRAMPORT_BRAM_Dout : std_logic_vector(0 to 31);
signal riffa_example_0_BRAMPORT_BRAM_EN : std_logic;
signal riffa_example_0_BRAMPORT_BRAM_Rst : std_logic;
signal riffa_example_0_BRAMPORT_BRAM_WEN : std_logic_vector(0 to 3);
signal riffa_example_0_CHANNEL_BUF_REQ : std_logic;
signal riffa_example_0_CHANNEL_BUF_REQD : std_logic;
signal riffa_example_0_CHANNEL_BUF_REQD_ADDR : std_logic_vector(31 downto 0);
signal riffa_example_0_CHANNEL_BUF_REQD_ERR : std_logic;
signal riffa_example_0_CHANNEL_BUF_REQD_RDY : std_logic;
signal riffa_example_0_CHANNEL_BUF_REQD_SIZE : std_logic_vector(4 downto 0);
signal riffa_example_0_CHANNEL_BUF_REQ_ACK : std_logic;
signal riffa_example_0_CHANNEL_BUF_REQ_ADDR : std_logic_vector(31 downto 0);
signal riffa_example_0_CHANNEL_BUF_REQ_ERR : std_logic;
signal riffa_example_0_CHANNEL_BUF_REQ_RDY : std_logic;
signal riffa_example_0_CHANNEL_BUF_REQ_SIZE : std_logic_vector(4 downto 0);
signal riffa_example_0_CHANNEL_DMA_DONE : std_logic;
signal riffa_example_0_CHANNEL_DMA_DST : std_logic_vector(31 downto 0);
signal riffa_example_0_CHANNEL_DMA_ERR : std_logic;
signal riffa_example_0_CHANNEL_DMA_LEN : std_logic_vector(31 downto 0);
signal riffa_example_0_CHANNEL_DMA_REQ : std_logic;
signal riffa_example_0_CHANNEL_DMA_REQ_ACK : std_logic;
signal riffa_example_0_CHANNEL_DMA_SIG : std_logic;
signal riffa_example_0_CHANNEL_DMA_SRC : std_logic_vector(31 downto 0);
signal riffa_example_0_CHANNEL_DOORBELL : std_logic;
signal riffa_example_0_CHANNEL_DOORBELL_ARG : std_logic_vector(31 downto 0);
signal riffa_example_0_CHANNEL_DOORBELL_ERR : std_logic;
signal riffa_example_0_CHANNEL_DOORBELL_LEN : std_logic_vector(31 downto 0);
signal riffa_example_0_CHANNEL_INTERRUPT : std_logic;
signal riffa_example_0_CHANNEL_INTERRUPT_ACK : std_logic;
signal riffa_example_0_CHANNEL_INTERRUPT_ERR : std_logic;
signal simpbus_slv_plbv46_adapter_0_SIMPBUS_SIMPBUS_ADDR : std_logic_vector(31 downto 0);
signal simpbus_slv_plbv46_adapter_0_SIMPBUS_SIMPBUS_BE : std_logic_vector(3 downto 0);
signal simpbus_slv_plbv46_adapter_0_SIMPBUS_SIMPBUS_DONE : std_logic;
Expand Down Expand Up @@ -1333,7 +1274,6 @@ architecture STRUCTURE of system is
attribute BOX_TYPE of system_simpbus_slv_plbv46_adapter_0_wrapper : component is "user_black_box";
attribute BOX_TYPE of system_simpbus_mst_plbv46_adapter_0_wrapper : component is "user_black_box";
attribute BOX_TYPE of system_riffa_0_wrapper : component is "user_black_box";
attribute BOX_TYPE of system_riffa_example_0_wrapper : component is "user_black_box";
attribute BOX_TYPE of system_bram_block_1_wrapper : component is "user_black_box";
attribute BOX_TYPE of system_xps_bram_if_cntlr_1_wrapper : component is "user_black_box";

Expand Down Expand Up @@ -1732,32 +1672,32 @@ begin
BUF_REQD_SIZE_00 => riffa_0_CHANNEL_BUF_REQD_SIZE,
BUF_REQD_RDY_00 => riffa_0_CHANNEL_BUF_REQD_RDY,
BUF_REQD_ERR_00 => riffa_0_CHANNEL_BUF_REQD_ERR,
INTERRUPT_01 => riffa_example_0_CHANNEL_INTERRUPT,
INTERRUPT_ERR_01 => riffa_example_0_CHANNEL_INTERRUPT_ERR,
INTERRUPT_ACK_01 => riffa_example_0_CHANNEL_INTERRUPT_ACK,
DOORBELL_01 => riffa_example_0_CHANNEL_DOORBELL,
DOORBELL_ERR_01 => riffa_example_0_CHANNEL_DOORBELL_ERR,
DOORBELL_LEN_01 => riffa_example_0_CHANNEL_DOORBELL_LEN,
DOORBELL_ARG_01 => riffa_example_0_CHANNEL_DOORBELL_ARG,
DMA_REQ_01 => riffa_example_0_CHANNEL_DMA_REQ,
DMA_REQ_ACK_01 => riffa_example_0_CHANNEL_DMA_REQ_ACK,
DMA_SRC_01 => riffa_example_0_CHANNEL_DMA_SRC,
DMA_DST_01 => riffa_example_0_CHANNEL_DMA_DST,
DMA_LEN_01 => riffa_example_0_CHANNEL_DMA_LEN,
DMA_SIG_01 => riffa_example_0_CHANNEL_DMA_SIG,
DMA_DONE_01 => riffa_example_0_CHANNEL_DMA_DONE,
DMA_ERR_01 => riffa_example_0_CHANNEL_DMA_ERR,
BUF_REQ_01 => riffa_example_0_CHANNEL_BUF_REQ,
BUF_REQ_ACK_01 => riffa_example_0_CHANNEL_BUF_REQ_ACK,
BUF_REQ_ADDR_01 => riffa_example_0_CHANNEL_BUF_REQ_ADDR,
BUF_REQ_SIZE_01 => riffa_example_0_CHANNEL_BUF_REQ_SIZE,
BUF_REQ_RDY_01 => riffa_example_0_CHANNEL_BUF_REQ_RDY,
BUF_REQ_ERR_01 => riffa_example_0_CHANNEL_BUF_REQ_ERR,
BUF_REQD_01 => riffa_example_0_CHANNEL_BUF_REQD,
BUF_REQD_ADDR_01 => riffa_example_0_CHANNEL_BUF_REQD_ADDR,
BUF_REQD_SIZE_01 => riffa_example_0_CHANNEL_BUF_REQD_SIZE,
BUF_REQD_RDY_01 => riffa_example_0_CHANNEL_BUF_REQD_RDY,
BUF_REQD_ERR_01 => riffa_example_0_CHANNEL_BUF_REQD_ERR,
INTERRUPT_01 => net_gnd0,
INTERRUPT_ERR_01 => net_gnd0,
INTERRUPT_ACK_01 => open,
DOORBELL_01 => open,
DOORBELL_ERR_01 => open,
DOORBELL_LEN_01 => open,
DOORBELL_ARG_01 => open,
DMA_REQ_01 => net_gnd0,
DMA_REQ_ACK_01 => open,
DMA_SRC_01 => net_gnd32(0 to 31),
DMA_DST_01 => net_gnd32(0 to 31),
DMA_LEN_01 => net_gnd32(0 to 31),
DMA_SIG_01 => net_gnd0,
DMA_DONE_01 => open,
DMA_ERR_01 => open,
BUF_REQ_01 => net_gnd0,
BUF_REQ_ACK_01 => open,
BUF_REQ_ADDR_01 => open,
BUF_REQ_SIZE_01 => open,
BUF_REQ_RDY_01 => open,
BUF_REQ_ERR_01 => open,
BUF_REQD_01 => open,
BUF_REQD_ADDR_01 => net_gnd32(0 to 31),
BUF_REQD_SIZE_01 => net_gnd5,
BUF_REQD_RDY_01 => net_gnd0,
BUF_REQD_ERR_01 => net_gnd0,
INTERRUPT_02 => net_gnd0,
INTERRUPT_ERR_02 => net_gnd0,
INTERRUPT_ACK_02 => open,
Expand Down Expand Up @@ -2133,13 +2073,13 @@ begin
BRAM_Addr_A => xps_bram_if_cntlr_0_PORTA_BRAM_Addr,
BRAM_Din_A => xps_bram_if_cntlr_0_PORTA_BRAM_Din,
BRAM_Dout_A => xps_bram_if_cntlr_0_PORTA_BRAM_Dout,
BRAM_Rst_B => riffa_0_BRAMPORT_BRAM_Rst,
BRAM_Clk_B => riffa_0_BRAMPORT_BRAM_Clk,
BRAM_EN_B => riffa_0_BRAMPORT_BRAM_EN,
BRAM_WEN_B => riffa_0_BRAMPORT_BRAM_WEN,
BRAM_Addr_B => riffa_0_BRAMPORT_BRAM_Addr,
BRAM_Din_B => riffa_0_BRAMPORT_BRAM_Din,
BRAM_Dout_B => riffa_0_BRAMPORT_BRAM_Dout
BRAM_Rst_B => riffa_0_BRAMPORT_0_BRAM_Rst,
BRAM_Clk_B => riffa_0_BRAMPORT_0_BRAM_Clk,
BRAM_EN_B => riffa_0_BRAMPORT_0_BRAM_EN,
BRAM_WEN_B => riffa_0_BRAMPORT_0_BRAM_WEN,
BRAM_Addr_B => riffa_0_BRAMPORT_0_BRAM_Addr,
BRAM_Din_B => riffa_0_BRAMPORT_0_BRAM_Din,
BRAM_Dout_B => riffa_0_BRAMPORT_0_BRAM_Dout
);

xps_bram_if_cntlr_0 : system_xps_bram_if_cntlr_0_wrapper
Expand Down Expand Up @@ -2323,52 +2263,20 @@ begin
BUF_REQD_SIZE => riffa_0_CHANNEL_BUF_REQD_SIZE,
BUF_REQD_RDY => riffa_0_CHANNEL_BUF_REQD_RDY,
BUF_REQD_ERR => riffa_0_CHANNEL_BUF_REQD_ERR,
BRAM_Rst => riffa_0_BRAMPORT_BRAM_Rst,
BRAM_Clk => riffa_0_BRAMPORT_BRAM_Clk,
BRAM_EN => riffa_0_BRAMPORT_BRAM_EN,
BRAM_WEN => riffa_0_BRAMPORT_BRAM_WEN,
BRAM_Addr => riffa_0_BRAMPORT_BRAM_Addr,
BRAM_Din => riffa_0_BRAMPORT_BRAM_Din,
BRAM_Dout => riffa_0_BRAMPORT_BRAM_Dout
);

riffa_example_0 : system_riffa_example_0_wrapper
port map (
SYS_CLK => clk_125_0000MHz,
SYS_RST => sys_bus_reset(0),
INTERRUPT => riffa_example_0_CHANNEL_INTERRUPT,
INTERRUPT_ERR => riffa_example_0_CHANNEL_INTERRUPT_ERR,
INTERRUPT_ACK => riffa_example_0_CHANNEL_INTERRUPT_ACK,
DOORBELL => riffa_example_0_CHANNEL_DOORBELL,
DOORBELL_ERR => riffa_example_0_CHANNEL_DOORBELL_ERR,
DOORBELL_LEN => riffa_example_0_CHANNEL_DOORBELL_LEN,
DOORBELL_ARG => riffa_example_0_CHANNEL_DOORBELL_ARG,
DMA_REQ => riffa_example_0_CHANNEL_DMA_REQ,
DMA_REQ_ACK => riffa_example_0_CHANNEL_DMA_REQ_ACK,
DMA_SRC => riffa_example_0_CHANNEL_DMA_SRC,
DMA_DST => riffa_example_0_CHANNEL_DMA_DST,
DMA_LEN => riffa_example_0_CHANNEL_DMA_LEN,
DMA_SIG => riffa_example_0_CHANNEL_DMA_SIG,
DMA_DONE => riffa_example_0_CHANNEL_DMA_DONE,
DMA_ERR => riffa_example_0_CHANNEL_DMA_ERR,
BUF_REQ => riffa_example_0_CHANNEL_BUF_REQ,
BUF_REQ_ACK => riffa_example_0_CHANNEL_BUF_REQ_ACK,
BUF_REQ_ADDR => riffa_example_0_CHANNEL_BUF_REQ_ADDR,
BUF_REQ_SIZE => riffa_example_0_CHANNEL_BUF_REQ_SIZE,
BUF_REQ_RDY => riffa_example_0_CHANNEL_BUF_REQ_RDY,
BUF_REQ_ERR => riffa_example_0_CHANNEL_BUF_REQ_ERR,
BUF_REQD => riffa_example_0_CHANNEL_BUF_REQD,
BUF_REQD_ADDR => riffa_example_0_CHANNEL_BUF_REQD_ADDR,
BUF_REQD_SIZE => riffa_example_0_CHANNEL_BUF_REQD_SIZE,
BUF_REQD_RDY => riffa_example_0_CHANNEL_BUF_REQD_RDY,
BUF_REQD_ERR => riffa_example_0_CHANNEL_BUF_REQD_ERR,
BRAM_Rst => riffa_example_0_BRAMPORT_BRAM_Rst,
BRAM_Clk => riffa_example_0_BRAMPORT_BRAM_Clk,
BRAM_EN => riffa_example_0_BRAMPORT_BRAM_EN,
BRAM_WEN => riffa_example_0_BRAMPORT_BRAM_WEN,
BRAM_Addr => riffa_example_0_BRAMPORT_BRAM_Addr,
BRAM_Din => riffa_example_0_BRAMPORT_BRAM_Din,
BRAM_Dout => riffa_example_0_BRAMPORT_BRAM_Dout
BRAM_Rst_0 => riffa_0_BRAMPORT_0_BRAM_Rst,
BRAM_Clk_0 => riffa_0_BRAMPORT_0_BRAM_Clk,
BRAM_EN_0 => riffa_0_BRAMPORT_0_BRAM_EN,
BRAM_WEN_0 => riffa_0_BRAMPORT_0_BRAM_WEN,
BRAM_Addr_0 => riffa_0_BRAMPORT_0_BRAM_Addr,
BRAM_Din_0 => riffa_0_BRAMPORT_0_BRAM_Din,
BRAM_Dout_0 => riffa_0_BRAMPORT_0_BRAM_Dout,
BRAM_Rst_1 => riffa_0_BRAMPORT_1_BRAM_Rst,
BRAM_Clk_1 => riffa_0_BRAMPORT_1_BRAM_Clk,
BRAM_EN_1 => riffa_0_BRAMPORT_1_BRAM_EN,
BRAM_WEN_1 => riffa_0_BRAMPORT_1_BRAM_WEN,
BRAM_Addr_1 => riffa_0_BRAMPORT_1_BRAM_Addr,
BRAM_Din_1 => riffa_0_BRAMPORT_1_BRAM_Din,
BRAM_Dout_1 => riffa_0_BRAMPORT_1_BRAM_Dout
);

bram_block_1 : system_bram_block_1_wrapper
Expand All @@ -2380,13 +2288,13 @@ begin
BRAM_Addr_A => xps_bram_if_cntlr_1_PORTA_BRAM_Addr,
BRAM_Din_A => xps_bram_if_cntlr_1_PORTA_BRAM_Din,
BRAM_Dout_A => xps_bram_if_cntlr_1_PORTA_BRAM_Dout,
BRAM_Rst_B => riffa_example_0_BRAMPORT_BRAM_Rst,
BRAM_Clk_B => riffa_example_0_BRAMPORT_BRAM_Clk,
BRAM_EN_B => riffa_example_0_BRAMPORT_BRAM_EN,
BRAM_WEN_B => riffa_example_0_BRAMPORT_BRAM_WEN,
BRAM_Addr_B => riffa_example_0_BRAMPORT_BRAM_Addr,
BRAM_Din_B => riffa_example_0_BRAMPORT_BRAM_Din,
BRAM_Dout_B => riffa_example_0_BRAMPORT_BRAM_Dout
BRAM_Rst_B => riffa_0_BRAMPORT_1_BRAM_Rst,
BRAM_Clk_B => riffa_0_BRAMPORT_1_BRAM_Clk,
BRAM_EN_B => riffa_0_BRAMPORT_1_BRAM_EN,
BRAM_WEN_B => riffa_0_BRAMPORT_1_BRAM_WEN,
BRAM_Addr_B => riffa_0_BRAMPORT_1_BRAM_Addr,
BRAM_Din_B => riffa_0_BRAMPORT_1_BRAM_Din,
BRAM_Dout_B => riffa_0_BRAMPORT_1_BRAM_Dout
);

xps_bram_if_cntlr_1 : system_xps_bram_if_cntlr_1_wrapper
Expand Down
2 changes: 1 addition & 1 deletion project/base_systems/ml505/hdl/system_central_notifier_0_wrapper.vhd
View file
Expand Up @@ -929,7 +929,7 @@ begin
generic map (
C_SIMPBUS_AWIDTH => 32,
C_SIMPBUS_DWIDTH => 32,
C_NUM_CHANNELS => 2,
C_NUM_CHANNELS => 1,
C_INIT_BUS => 0,
C_DMA_BASE_ADDR => X"80200000",
C_PCIE_BASE_ADDR => X"85C00000",
Expand Down

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