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Fix Vitis CI #1344
Fix Vitis CI #1344
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In the distant past we used to use s3 to host FPGA images (in the fpga-zynq days). We could do the same with HWDB collateral. |
For users that don't have an AWS account (and maybe don't want one), would they be able to download S3 objects? My impression is that you are required to have an account to access anything in an S3 bucket. |
If the bucket is public, then you can access it without an account afaik. Should be able to just access it through the URI. |
@t14916 This should now be good to re-review. The Vitis test failed with a |
@t14916 @davidbiancolin This PR is ready for review. |
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LGTM, but just as an FYI your XRT shell PR here: #1385 is being merged into this branch so you might wanna either merge that first or merge it into main.
Yup. I did that on purpose so that the diff wasn't horrible since I was working on that PR on the same branch as this. GitHub is smart enough to change the base branch once this PR goes in. |
This fixes the Vitis CI by adding a
-ldl
to the linker for all systems (should be safe for v18/20 Ubuntu systems). As part of this PR, I also regenerated anxclbin
(@ 140MHz). Instead of placing it on the server, I instead download it from the internet (I created a publicly accessible bucket under the AWS CI account) so anyone could potentially build their own bitstream, add it to the S3 bucket, and just change the link to it. In the future, this can use a URI (once we add URI support back into the manager).Related PRs / Issues
UI / API Impact
Verilog / AGFI Compatibility
Contributor Checklist
changelog:<topic>
label?ci:fpga-deploy
label?Please Backport
label?Reviewer Checklist (only modified by reviewer)
Note: to run CI on PRs from forks, comment
@Mergifyio copy main
and manage the change from the new PR.changelog:<topic>
label?