VCS and Verilator DPI switchover

[nandor]

This PR unifies the VCS and Verilator toplevels. After this change, the simulation is nested under the top-level and synchronisation between the driver and the simulations is identical across both environments.

Unfortunately, huge variance in performance is noticeable, caused by the --output-split flag of verilator. With the change, the splits are selected such that a regression is noticeable, however performance can be regained by tweaking the option.

Related PRs / Issues

UI / API Impact

Verilog / AGFI Compatibility

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[sifive-benjamin-morse]

There are some const that could be added, but they are from legacy code. Looks good to me.