Support building U280 in CI

[abejgonzalez]

Adds a U280 build to the CI (runs after the 1st set of bitstreams build - due to a lack of CI machines).

Related PRs / Issues

UI / API Impact

Verilog / AGFI Compatibility

Contributor Checklist

• Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
• Did you add Scaladoc/docstring/doxygen to every public function/method?
• Did you add at least one test demonstrating the PR?
• Did you delete any extraneous prints/debugging code?
• Did you state the UI / API impact?
• Did you specify the Verilog / AGFI compatibility impact?

• If applicable, did you regenerate and publicly share default AGFIs?

• If applicable, did you apply the ci:fpga-deploy label?

• If applicable, did you apply the Please Backport label?

Reviewer Checklist (only modified by reviewer)

Note: to run CI on PRs from forks, comment @Mergifyio copy main and manage the change from the new PR.

• Is the title suitable for inclusion in the changelog and does the PR have a changelog:<topic> label?
• Did you mark the proper release milestone?
• Did you check whether all relevant Contributor checkboxes have been checked?