Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Various changes #34

Closed
wants to merge 5 commits into from
Closed

Various changes #34

wants to merge 5 commits into from

Conversation

huming2207
Copy link

Hi there,

Here are some changes I've made in my internship project previously, including:

  1. theatrically improving linux_spi maximum write speed.
  2. Winbond W25Q256 chips' ADP bit read/write support
  3. some performance changes

I'm not sure if I should put several commits in one PR, but I have no idea how to separate them in one branch. If you are not happy about that, I'll create more than one branches and put each of the commit in the branch separately.

Regards,
Jackson

Previously only the write speed would be set by `spispeed` argument.
In this commit, read speed will also be set by that.

Tested on Widora NEO with mainline OpenWrt (Linux 4.9)
and software emulated SPI (spi-gpio). No errors but SPI
remains on about 1.5MHz. This is due to the performance
limitation of spi-gpio driver in the linux kernel. The
hardware on this board is too weak to run with a higher
SPI clock speed (CPU is MTK's MT7688, single MIPS24kc
core @ 580MHz).

As a result, this patch should be tested by others again
if you have a more powerful device.

Change-Id: If834ab4a94f5f591137e3dede84bbb9530b65ad0
Signed-off-by: Jackson Ming Hu <huming2207@gmail.com>
Tested with W25Q256JV and W25Q256FV chips, no errors.

Change-Id: Ic8b64bd0841c93db544b9af15f824139a7e45cba
Signed-off-by: Jackson Ming Hu <huming2207@gmail.com>
1. Try chip erase first before other erase methods
2. Decrease BUSY waiting time

This patch may siginificantly improve erase performance, especially
on some chips which have built-in chip-erase support (e.g. W25Q128,
16MB, ~120s -> ~55s).

Change-Id: I9e6628931205b6d1de4d96fa346e4cdf07f65845
Signed-off-by: Jackson Ming Hu <huming2207@gmail.com>
Some Winbond W25Q flash chips (larger than 128Mbit) support 4-byte addressing mode.
Those chips also allows setting to 4-byte addressing as default when powering up.

But some devices may not support 4-byte addressing mode in their bootloaders/kernels.
As a result, this update allows user to read/enable/disable this feature by setting
the ADP bit in the 3rd status register inside the flash chip.

Ref: https://www.winbond.com/resource-files/w25q256fv_revg1_120214_qpi_website_rev_g.pdf
	Page 12, 18, 33-35

Change-Id: I54cd59e0a3cc1f08b2c03db01d73bc0a0170b192
Signed-off-by: Jackson Ming Hu <huming2207@gmail.com>
Previously if user picks a image file which are smaller than the
chip size, this program will throws an "Image size mismatch"
error.

But it should be allowed anyway, just like those commercial SPI
programmer products did.

Change-Id: I1dc1922d4b8ee07ebef58c6196a5576ce6bd99f7
Signed-off-by: Jackson Ming Hu <huming2207@gmail.com>
@mikebdp2
Copy link
Contributor

mikebdp2 commented Sep 4, 2018

@huming2207 Sorry, but KB9012 support patches have been already merged with the flashrom's master branch at 12 February 2018. Please check what commits of your pull request are still important, and rebase them on top of the flashrom's master branch. Ideally that should be done at gerrit - https://review.coreboot.org/q/project:flashrom+status:open

@huming2207
Copy link
Author

@mikebdp2 Hello Mike,

Sorry for that I forgot this pull request and I cherry-picked that commit into my repo's master branch. I will consider removing it later.

Regards,
Jackson

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

2 participants