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SipHash: a fast short-input PRF

branch: master

Basic+SSE2+SSSE3 implementation of SipHash-2-4 based off the paper. On an E5200, icc gives the best speeds for all SSE versions & 32bit versions, gcc gives the best speed for 64bit basic

done to see how difficult implementing the spec was as their source is not up (yet), and curious about 32bit performance

Performance on an E5200

Best Impl. 7 bytes 128 bytes 1024 bytes
icc 32bit 202 cycles 1015 cycles 6.7 cpb
icc 32bit sse2 135 cycles 688 cycles 4.48 cpb
icc 32bit ssse3 125 cycles 614 cycles 3.98 cpb
gcc 64bit 61 cycles 276 cycles 1.81 cpb


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