gas64 : fb_sgnl replaced by simple asm code and type forced to LONG

src/compiler/ast-node-uop.bas

@@ -225,7 +225,11 @@ function astNewUOP _
 	'' with SGN(int) and [u]integer negation the result is always a signed integer
 	case AST_OP_SGN
 		if( typeGetClass( o->dtype ) = FB_DATACLASS_INTEGER ) then
-			dtype = typeToSigned( dtype )
+			if env.clopt.backend = FB_BACKEND_GAS64 then
+				dtype = FB_DATATYPE_LONG
+			else
+				dtype = typeToSigned( dtype )
+			end if
 		end if
 
 	case AST_OP_NEG
@@ -304,7 +308,6 @@ function astNewUOP _
 
 	'' alloc new node
 	n = astNewNode( AST_NODECLASS_UOP, dtype, subtype )
-
 	n->l = o
 	n->r = NULL
 	n->op.op = op
@@ -342,6 +345,9 @@ function astLoadUOP _
 			vr = irAllocVREG( astGetFullType( o ), o->subtype )
 			v1->vector = n->vector
 			vr->vector = n->vector
+			if(( op = AST_OP_SGN ) and ( env.clopt.backend = FB_BACKEND_GAS64 ) ) then
+				 vr->dtype = FB_DATATYPE_LONG
+			EndIf
 		else
 			vr = NULL
 			v1->vector = n->vector

src/compiler/ir-gas64.bas

@@ -2404,7 +2404,14 @@ private function _supportsop(byval op as integer,byval dtype as Integer) as inte
 	select case as const( op )
 		'case AST_OP_SGN, AST_OP_FIX, AST_OP_FRAC, _
 		'    AST_OP_ASIN, AST_OP_ACOS, AST_OP_TAN, AST_OP_ATAN, _
-		case AST_OP_SGN,AST_OP_RSQRT, AST_OP_RCP
+		case AST_OP_SGN
+			if typeGetClass( dtype ) = FB_DATACLASS_FPOINT then
+				return false
+			else
+				''sgn available only for integer
+				return true
+			end if
+		case AST_OP_RSQRT, AST_OP_RCP
 			return FALSE
 		case AST_OP_ABS,AST_OP_NEG,AST_OP_NOT,AST_OP_SQRT
 
@@ -4033,32 +4040,34 @@ private sub _emituop(byval op as integer,byval v1 as IRVREG ptr,byval vr as IRVR
 	end if
 
 	if op=AST_OP_SGN And tempodtype <> FB_DATATYPE_DOUBLE then
-
-		if op1<>*regstrq(KREG_RCX) then
-			if reghandle(KREG_RCX)<>KREGFREE then ''as rcx is used need to transfer its contain to another register
-				tempo=reghandle(KREG_RCX)
-				reg_findfree(tempo)
-				reghandle(KREG_RCX)=KREGFREE
-				asm_info("rcx used so transfer to other register="+*regstrq(reg_findreal(tempo)))
-				asm_code("mov "+*regstrq(reg_findreal(tempo))+", "+*regstrq(KREG_RCX))
-				op1=*regstrq(reg_findreal(tempo))
-				if vrreg=KREG_RCX then vrreg=reg_findreal(tempo)
+		var lname = *symbUniqueLabel( )
+		if v1->typ=IR_VREGTYPE_REG then
+			asm_code("cmp "+op1+", 0")
+			asm_code("je "+lname)
+			asm_code("mov "+op1+", 1")
+			asm_code("jg "+lname)
+			asm_code("mov "+op1+", -1")
+			asm_code(lname+":")
+			''as same register used need to forced
+			restore_vrreg(vr,vrreg)
+			''result in a 64bit register but doesn't matter
+		else
+			asm_code("mov rax, "+op1)
+			asm_code("cmp rax, 0")
+			asm_code("je "+lname)
+			asm_code("mov eax, 1")
+			asm_code("jg "+lname)
+			asm_code("mov eax, -1")
+			asm_code(lname+":")
+			if vr=0 then
+				''not used
+				asm_code("mov "+op1+", eax")
 			else
-				ctx.usedreg Or=(1 Shl KREG_RCX)
+				asm_code("mov "+*regstrd(vrreg)+", eax")
 			end if
-			asm_code("mov rcx, "+op1)
-		end if
-
-		save_call("fb_SGNl",vr,vrreg) ''letter L
-		asm_code("movsxd rax, eax")
-		if vr=0 then
-			asm_code("mov "+op1+", rax")
-		else
-			asm_code("mov "+*regstrq(vrreg)+", rax")
 		end if
 		return
 	end if
-
 	''for double , integer must have been converted before
 	if v1->typ=IR_VREGTYPE_REG then
 		asm_code("movq xmm0, "+op1)