TRM: Overview
Z80 Memory address | Description | Reg Hex/Int | Initial Register Value |
---|---|---|---|
$0000 - $3FFF | Bank 0 | $F0 / 240 | 192 = ROM Page 0 + READ ONLY + OVERLAY |
$4000 - $7FFF | Bank 1 | $F1 / 241 | 33 = RAM Page 33 |
$8000 - $BFFF | Bank 2 | $F2 / 242 | 34 = RAM Page 34 |
$C000 - $FFFF | Bank 3 | $F3 / 243 | 19 = Cartridge Port Page 19 |
When setting the Overlay RAM bit of the BANKx registers, the memory at offset $3000-$3FFF for that BANK is replaced with the functions listed in the chart below. This is not limited to BANK0, although the default code for existing Aquarius software expects it to be there. But why would anyone want to change this? As an example, screen update code could be rewritten to update BANK3 (starting at $C000) with the OVERLAY bit set, placing an access point to CHARRAM at $F000 ($C000 + $3000), COLRAM at $F400, and BASIC RAM at $F800. Since the BASIC interpreter expects its variables and code to start at $3800, this is likely not possible with BASIC -- you're pulling the rug out from under your BASIC interpreter -- but it's possible using assembly/machine code. Also, the OVERLAY bit can be set in any/all of the banks simultaneously, which would allow a programmer to update the border character at $3000, $7000, $B000, and/or $F000.
Offset | Description |
---|---|
$3000 - $33FF | CHARRAM (1KB) |
$3400 - $37FF | COLRAM (1KB) |
$3800 - $3FFF | BASIC RAM (2KB) (last 2KB of page 32) |
Page | Description |
---|---|
0 | System ROM memory (16KB) |
1-15 | - |
16-19 | Cartridge port (data via scrambling register) |
20 | Video RAM |
21 | Character RAM |
22-31 | Reserved |
32-39 | plusBASIC Reserved RAM (128KB) |
40-63 | Available User RAM (384KB) |
Video RAM used by tile / bitmap / sprite engine.
Offset | Description |
---|---|
$0000 - $1F3F | 8KB Bitmap (1bpp) RAM |
$2000 - $23E7 | 1KB Bitmap (1bpp) Color RAM (40x25) |
$0000 - $3E7F | 16KB Bitmap (4bpp) RAM |
$0000 - $0FFF | 4KB Tile map 64x32 |
$0000 - $3FFF | 16KB Tile data (max 512 patterns) |
As seen in above table, the address ranges overlap. Since bitmap mode and tile mode are mutual exclusive, this doesn't pose a problem. The amount of available tile data that can be used for sprites is dependent on the selected mode.
Bitmap mode (1bpp) uses the bitmap RAM (@ $0000). It uses 1 bit per pixel to determine if a pixel is set or clear. The actual color index is determined by the bitmap color RAM (@ $2000), which specifies the foreground/background color index per 8x8 pixels (similar to text color RAM). This color index is used to lookup the actual color in the tile/bitmap palette.
Bitmap mode (4bpp) uses the bitmap RAM (@ $0000). It uses 4 bits per pixel to determine the pixel color index. This color index is used to lookup the actual color in the tile/bitmap palette.
Tile mode uses the tile map (@ $0000) to determine which 8x8 pattern to display. This pattern is identified by an index which specifies a base address in video RAM: vram_address = tile_idx * 32
. Each tile pattern uses 4 bits per pixel to specify the color index for each pixel. This color index is used to lookup the actual color in the tile/bitmap palette.
Sprites use the parameters set via the sprite IO registers. The sprites use the same tile map data format as the tile mode, but the color index lookup is performed using the sprite palette instead.
Offset | Description |
---|---|
$0000 - $07FF | 2KB Character RAM |
$0800 - $3FFF | - |
The character RAM is used by the text mode character generator to display text on the screen. The characters can be redefined by writing to the character RAM.
The current line number is reflected in the VLINE register. Internal line numbers range from 0-261. Line numbers above 255 are reflected in this register as 255.
The IRQMASK register determines which video events generate an interrupt.
The IRQSTAT indicates pending interrupts when read. When writing a 1 to a corresponding bit the event is cleared.
Text mode and sprites can be enabled simultaneously with either tile map mode or bitmap mode.
Normally the character and color in the border is determined by the value at address offset 0 of CHARRAM and COLRAM respectively. Setting the Remap border character in the VCTRL register will change this address to offset 1023 (offset 2047 in 80-columns mode). This will allow using the full 40x25 (or 80x25) text buffer without influencing the border.
The tile map scroll registers determine which part of the tile map is visible on the screen. They determine the offset within the tile map for the upper left corner of the screen.
Sprites can be set partially off-screen by using negative values. For example, a sprite positioned at X-position 508, will show 4 pixels on the left side of the screen.
Value | Description |
---|---|
0 | Disabled |
1 | 64x32 tilemap |
2 | 320x200 bitmapped (1bpp - fg/bg color selectable per 8x8 pixels) |
3 | 160x200 bitmapped (4bpp) |
64x32 entries, each with the following format:
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
---|---|---|---|---|---|---|---|
Tile index (7:0) | |||||||
- | Priority | Palette | - | V-flip | H-flip | Tile index (8) |
If the Priority bit is set, the tile is displayed in front of sprites (if sprite priority bit is not set as well).
If V-flip bit is set, the sprite is vertically mirrored.
If H-flip bit is set, the sprite is horizontally mirrored.
512 tile pattern entries. Each pattern is 32 bytes in size. Each pattern is 8x8 pixels of 4 bits per pixel. Each byte contains 2 pixels, the upper 4 bits contains the palette index of the left pixel, the lower 4 bits the palette index of the right pixel.
The current line number is reflected in the VLINE register. Internal line numbers range from 0-261. Line numbers above 255 are reflected in this register as 255.
The IRQMASK register determines which video events generate an interrupt.
The IRQSTAT indicates pending interrupts when read. When writing a 1 to a corresponding bit the event is cleared.
IO reg | Name | Description | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
---|---|---|---|---|---|---|---|---|---|---|
$00-$DF | - | - | - | |||||||
$E0/224 | VCTRL | Video control register | 2nd text page | 80-columns mode | Remap border character | Text priority | Sprites enable | Graphics mode | Text enable | |
$E1/225 | VSCRX_L | Tilemap horizontal scroll | Tile map X-scroll (7:0) | |||||||
$E2/226 | VSCRX_H | Tilemap horizontal scroll | - | Tile map X-scroll (8) | ||||||
$E3/227 | VSCRY | Tilemap vertical scroll | Tile map Y-scroll | |||||||
$E4/228 | VSPRSEL | Sprite select | - | Sprite selection (0-63) | ||||||
$E5/229 | VSPRX_L | Sprite X-position | Sprite X-position (7:0) | |||||||
$E6/230 | VSPRX_H | Sprite X-position | - | Sprite X-position (8) | ||||||
$E7/231 | VSPRY | Sprite Y-position | Sprite Y-position | |||||||
$E8/232 | VSPRIDX | Sprite tile index | Sprite tile index (7:0) | |||||||
$E9/233 | VSPRATTR | Sprite attributes | Enable | Priority | Palette | Height: 16 | V-flip | H-flip | Tile index (8) | |
$EA/234 | VPALSEL | Palette entry selection | - | Palette | Entry | 0:GB, 1:R | ||||
$EB/235 | VPALDATA (GB) | Palette entry G/B | Green | Blue | ||||||
$EB/235 | VPALDATA (R) | Palette entry R | - | Red | ||||||
$EC/236 | VLINE (R) | Current video line | Current line number | |||||||
$EC/236 | PCMDAC (W) | Audio DAC | Audio sample (8-bit unsigned) | |||||||
$ED/237 | VIRQLINE | Video line at which to generate interrupt | Line number at which to generate IRQ | |||||||
$EE/238 | IRQMASK | Interrupt masking register | - | Line | V-blank | |||||
$EF/239 | IRQSTAT | Interrupt status register | - | Line | V-blank | |||||
$F0/240 | BANK0 | Bank 0 ($0000-$3FFF) page | Read only | Overlay RAM | Page | |||||
$F1/241 | BANK1 | Bank 1 ($4000-$7FFF) page | Read only | Overlay RAM | Page | |||||
$F2/242 | BANK2 | Bank 2 ($8000-$BFFF) page | Read only | Overlay RAM | Page | |||||
$F3/243 | BANK3 | Bank 3 ($C000-$FFFF) page | Read only | Overlay RAM | Page | |||||
$F4/244 | ESPCTRL | ESP32 control/status | Transmit break | - | RX FIFO overflow | RX framing error | RX break received | TX busy | RX FIFO non-empty | |
$F5/245 | ESPDATA | ESP32 data | FIFO read / write | |||||||
$F6/246 | PSG1DATA | PSG1: AY-3-8910 | Data | |||||||
$F7/247 W | PSG1ADDR | PSG1: AY-3-8910 | - | Address | ||||||
$F8/248 | PSG2DATA | PSG2: AY-3-8910 | Data | |||||||
$F9/249 W | PSG2ADDR | PSG2: AY-3-8910 | - | Address | ||||||
$FA/250 | KEYBUF | Keyboard buffer | Keyboard data | |||||||
$FB/251 | SYSCTRL | System control register | - | Turbo mode (7.16MHz) | Disable PSGs | Disable regs $E0-$F5, $F8-$F9 | ||||
$FC/252 R | CASSETTE | Cassette interface | - | Cassette input | ||||||
$FC/252 W | CASSETTE | Cassette interface | - | Cassette/sound output | ||||||
$FD/253 R | VSYNC | V-sync indication | - | V-sync signal (0: in v-sync) | ||||||
$FD/253 W | CPM | CP/M memory remapping | - | Enable CP/M remapping | ||||||
$FE/254 R | PRINTER | Serial printer | - | Clear to send status | ||||||
$FE/254 W | PRINTER | Serial printer | - | Serial printer output | ||||||
$FF/255 R | KEYBOARD | Keyboard matrix | Keyboard | |||||||
$FF/255 W | SCRAMBLE | Scramble | External bus scramble value (XOR) - not present in Aq+ |