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RISC-V: Add rounding mode enum for fixed-point intrinsics
Hi, since fixed-point with modeling rounding mode intrinsics are coming: riscv-non-isa/rvv-intrinsic-doc#222 I am adding vxrm rounding mode enum to user first before the API intrinsic. This patch is simple && obvious. Ok for trunk ? gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function. (DEF_RVV_VXRM_ENUM): New macro. (handle_pragma_vector): Add vxrm enum register. * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro. (RNU): Ditto. (RNE): Ditto. (RDN): Ditto. (ROD): Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/vxrm-1.c: New test.
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Original file line number | Diff line number | Diff line change |
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/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ | ||
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#include "riscv_vector.h" | ||
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size_t f0 () | ||
{ | ||
return VXRM_RNU; | ||
} | ||
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size_t f1 () | ||
{ | ||
return VXRM_RNE; | ||
} | ||
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size_t f2 () | ||
{ | ||
return VXRM_RDN; | ||
} | ||
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size_t f3 () | ||
{ | ||
return VXRM_ROD; | ||
} | ||
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/* { dg-final { scan-assembler-times {li\s+[a-x0-9]+,\s*0} 1} } */ | ||
/* { dg-final { scan-assembler-times {li\s+[a-x0-9]+,\s*1} 1} } */ | ||
/* { dg-final { scan-assembler-times {li\s+[a-x0-9]+,\s*2} 1} } */ | ||
/* { dg-final { scan-assembler-times {li\s+[a-x0-9]+,\s*3} 1} } */ |