hf_lo_p2.sch

v 20091004 2
C 37100 36800 0 0 0 title-bordered-C.sym
C 50200 47100 1 0 0 AD9834.sym
{
T 50500 52200 5 10 1 1 0 0 1
refdes=U5
T 49800 53600 5 10 0 0 0 0 1
device=AD9834
T 49800 54200 5 10 0 0 0 0 1
footprint=AD9834_TSSOP20
}
C 52300 52600 1 0 0 generic-supply-1.sym
{
T 52500 52850 5 10 0 1 0 3 1
net=AVdd:1
T 52700 53700 5 10 0 0 0 0 1
footprint=none
T 52700 53500 5 10 0 0 0 0 1
device=PWR
T 52500 52900 9 10 1 1 0 4 1
netname=AVdd
}
N 52500 52600 52500 52400 4
N 51400 52600 51400 52400 4
C 51100 46200 1 0 0 gnd-1.sym
N 51200 46500 51200 47100 4
N 49000 50200 50200 50200 4
{
T 48900 50200 5 8 1 1 0 7 1
netname=dds_sleep
}
N 49000 49800 50200 49800 4
{
T 48900 49800 5 8 1 1 0 7 1
netname=dds_reset
}
C 48900 50400 1 0 0 resistor-1.sym
{
T 49200 50800 5 10 0 0 0 0 1
device=RESISTOR
T 48800 50600 5 8 1 1 0 1 1
refdes=R7
T 49700 50600 5 8 1 1 0 1 1
value=10k
T 48900 50400 5 10 0 0 0 0 1
footprint=0603
}
N 50200 48600 49000 48600 4
{
T 48900 48600 5 8 1 1 0 7 1
netname=\_sel_dds\_
}
N 50200 49400 49000 49400 4
{
T 48900 49400 5 8 1 1 0 7 1
netname=dds_fselect
}
N 50200 49000 49000 49000 4
{
T 48900 49000 5 8 1 1 0 7 1
netname=dds_pselect
}
N 49800 50500 50000 50500 4
N 48900 50500 48300 50500 4
N 48300 50500 48300 50700 4
N 50200 48200 49000 48200 4
{
T 48900 48200 5 8 1 1 0 7 1
netname=rf_sclk
}
N 49000 47800 50200 47800 4
{
T 48900 47800 5 8 1 1 0 7 1
netname=rf_mosi
}
N 52600 46500 52600 47100 4
N 50000 51700 50000 52700 4
N 50000 51700 50200 51700 4
N 48600 52100 48900 52100 4
C 48500 51600 1 0 0 gnd-1.sym
C 54000 49900 1 0 0 capacitor-1.sym
{
T 54200 50600 5 10 0 0 0 0 1
device=CAPACITOR
T 54000 50200 5 8 1 1 0 1 1
refdes=C14
T 54200 50800 5 10 0 0 0 0 1
symversion=0.1
T 54600 50200 5 8 1 1 0 1 1
value=0.1uF
T 54000 49900 5 10 0 0 0 0 1
footprint=0603
}
N 53600 50100 54000 50100 4
N 54900 50100 55100 50100 4
C 54000 50400 1 0 0 capacitor-1.sym
{
T 54200 51100 5 10 0 0 0 0 1
device=CAPACITOR
T 54000 50700 5 8 1 1 0 1 1
refdes=C15
T 54200 51300 5 10 0 0 0 0 1
symversion=0.1
T 54600 50700 5 8 1 1 0 1 1
value=0.1uF
T 54000 50400 5 10 0 0 0 0 1
footprint=0603
}
C 54000 51000 1 0 0 resistor-1.sym
{
T 54300 51400 5 10 0 0 0 0 1
device=RESISTOR
T 53900 51200 5 8 1 1 0 1 1
refdes=R8
T 54700 51200 5 8 1 1 0 1 1
value=6.8k
T 54000 51000 5 10 0 0 0 0 1
footprint=0603
}
N 53600 50600 54000 50600 4
N 53800 50600 53800 51100 4
N 53800 51100 54000 51100 4
N 54900 51100 55100 51100 4
N 55100 49900 55100 51100 4
N 55100 50100 55100 50600 4
N 55100 50600 54900 50600 4
C 54000 51800 1 90 0 capacitor-1.sym
{
T 53300 52000 5 10 0 0 90 0 1
device=CAPACITOR
T 53700 51800 5 8 1 1 90 1 1
refdes=C16
T 53100 52000 5 10 0 0 90 0 1
symversion=0.1
T 53700 52400 5 8 1 1 90 1 1
value=0.1uF
T 54000 51800 5 10 0 0 0 0 1
footprint=0603
}
N 53600 51600 53800 51600 4
N 53800 52700 53800 52900 4
C 53600 52900 1 0 0 generic-supply-1.sym
{
T 53800 53150 5 10 0 1 0 3 1
net=AVdd:1
T 54000 54000 5 10 0 0 0 0 1
footprint=none
T 54000 53800 5 10 0 0 0 0 1
device=PWR
T 53800 53200 9 10 1 1 0 4 1
netname=AVdd
}
N 48900 52700 48600 52700 4
N 49800 52700 50000 52700 4
C 48900 52500 1 0 0 capacitor-1.sym
{
T 48900 52800 5 8 1 1 0 1 1
refdes=C17
T 49500 52800 5 8 1 1 0 1 1
value=0.1uF
T 49100 53200 5 10 0 0 0 0 1
device=CAPACITOR
T 49100 53400 5 10 0 0 0 0 1
symversion=0.1
T 48900 52500 5 10 0 0 0 0 1
footprint=0603
}
N 48600 51900 48600 52700 4
C 48900 51900 1 0 0 capacitor-1.sym
{
T 49100 52600 5 10 0 0 0 0 1
device=CAPACITOR
T 48900 52200 5 8 1 1 0 1 1
refdes=C18
T 49100 52800 5 10 0 0 0 0 1
symversion=0.1
T 49500 52200 5 8 1 1 0 1 1
value=1uF
T 48900 51900 5 10 0 0 0 0 1
footprint=0603
}
N 49800 52100 50000 52100 4
C 40300 37400 1 0 0 gnd-1.sym
N 40400 39000 40400 39400 4
N 40400 38100 40400 37700 4
C 40600 38100 1 90 0 capacitor-1.sym
{
T 39900 38300 5 10 0 0 90 0 1
device=CAPACITOR
T 40300 38100 5 8 1 1 90 0 1
refdes=C19
T 39700 38300 5 10 0 0 90 0 1
symversion=0.1
T 40300 38700 5 8 1 1 90 0 1
value=0.1uF
T 40600 38100 5 10 0 0 0 0 1
footprint=0603
}
N 41900 39000 41900 39400 4
N 41900 38100 41900 37700 4
C 42100 38100 1 90 0 capacitor-1.sym
{
T 41400 38300 5 10 0 0 90 0 1
device=CAPACITOR
T 41800 38100 5 8 1 1 90 0 1
refdes=C20
T 41200 38300 5 10 0 0 90 0 1
symversion=0.1
T 41800 38700 5 8 1 1 90 0 1
value=0.1uF
T 42100 38100 5 10 0 0 0 0 1
footprint=0603
}
C 41700 39400 1 0 0 generic-supply-1.sym
{
T 41900 39650 5 10 0 1 0 3 1
net=AVdd:1
T 42100 40500 5 10 0 0 0 0 1
footprint=none
T 42100 40300 5 10 0 0 0 0 1
device=PWR
T 41900 39700 9 10 1 1 0 4 1
netname=AVdd
}
N 53800 51600 53800 51800 4
N 54900 48700 54900 48200 4
C 53600 48200 1 0 0 nc-right-1.sym
{
T 53700 48700 5 10 0 0 0 0 1
value=NoConnection
T 53700 48900 5 10 0 0 0 0 1
device=DRC_Directive
}
C 55000 47300 1 90 0 resistor-1.sym
{
T 54600 47600 5 10 0 0 90 0 1
device=RESISTOR
T 54800 47200 5 8 1 1 90 1 1
refdes=R9
T 54800 48100 5 8 1 1 90 1 1
value=200
T 55000 47300 5 10 0 0 0 0 1
footprint=0603
}
N 54900 46700 54900 47300 4
N 53600 49100 56000 49100 4
{
T 56100 49100 5 8 1 1 0 1 1
netname=f_out
}
C 55400 47300 1 90 0 resistor-1.sym
{
T 55000 47600 5 10 0 0 90 0 1
device=RESISTOR
T 55200 47200 5 8 1 1 90 1 1
refdes=R10
T 55200 48100 5 8 1 1 90 1 1
value=200
T 55400 47300 5 10 0 0 0 0 1
footprint=0603
}
N 55300 48200 55300 49100 4
N 55300 47300 55300 46700 4
N 52600 46700 55300 46700 4
N 53600 48700 56000 48700 4
{
T 56100 48700 5 8 1 1 0 1 1
netname=f_outb
}
N 45900 43900 47200 43900 4
N 48100 43900 49700 43900 4
C 49700 43800 1 0 0 inductor-1.sym
{
T 49900 44300 5 10 0 0 0 0 1
device=INDUCTOR
T 49600 44000 5 8 1 1 0 0 1
refdes=L1
T 49900 44500 5 10 0 0 0 0 1
symversion=0.1
T 50500 44000 5 8 1 1 0 0 1
value=?
T 49700 43800 5 10 0 0 0 0 1
footprint=0603
}
N 50600 43900 51800 43900 4
N 42500 43900 45000 43900 4
{
T 42400 43900 5 8 1 1 0 7 1
netname=f_out
}
N 48800 43900 48800 43600 4
N 48800 42400 48800 42700 4
C 53600 47800 1 0 0 nc-right-1.sym
{
T 53700 48300 5 10 0 0 0 0 1
value=NoConnection
T 53700 48500 5 10 0 0 0 0 1
device=DRC_Directive
}
N 50000 50500 50000 50200 4
N 44500 43900 44500 43600 4
N 44500 42400 44500 42700 4
C 45000 43800 1 0 0 inductor-1.sym
{
T 45200 44300 5 10 0 0 0 0 1
device=INDUCTOR
T 44900 44000 5 8 1 1 0 0 1
refdes=L2
T 45200 44500 5 10 0 0 0 0 1
symversion=0.1
T 45800 44000 5 8 1 1 0 0 1
value=?
T 45000 43800 5 10 0 0 0 0 1
footprint=0603
}
N 51200 43900 51200 43600 4
N 51200 42400 51200 42700 4
C 44700 42700 1 90 0 capacitor-1.sym
{
T 44000 42900 5 10 0 0 90 0 1
device=CAPACITOR
T 44400 42700 5 8 1 1 90 0 1
refdes=C21
T 43800 42900 5 10 0 0 90 0 1
symversion=0.1
T 44400 43400 5 8 1 1 90 0 1
value=?
T 44700 42700 5 10 0 0 0 0 1
footprint=0603
}
C 49000 42700 1 90 0 capacitor-1.sym
{
T 48300 42900 5 10 0 0 90 0 1
device=CAPACITOR
T 48700 42700 5 8 1 1 90 0 1
refdes=C22
T 48100 42900 5 10 0 0 90 0 1
symversion=0.1
T 48700 43400 5 8 1 1 90 0 1
value=?
T 49000 42700 5 10 0 0 0 0 1
footprint=0603
}
C 51400 42700 1 90 0 capacitor-1.sym
{
T 50700 42900 5 10 0 0 90 0 1
device=CAPACITOR
T 51100 42700 5 8 1 1 90 0 1
refdes=C23
T 50500 42900 5 10 0 0 90 0 1
symversion=0.1
T 51100 43400 5 8 1 1 90 0 1
value=?
T 51400 42700 5 10 0 0 0 0 1
footprint=0603
}
N 46500 43900 46500 43600 4
N 46500 42400 46500 42700 4
C 46700 42700 1 90 0 capacitor-1.sym
{
T 46000 42900 5 10 0 0 90 0 1
device=CAPACITOR
T 46400 42700 5 8 1 1 90 0 1
refdes=C24
T 45800 42900 5 10 0 0 90 0 1
symversion=0.1
T 46400 43400 5 8 1 1 90 0 1
value=?
T 46700 42700 5 10 0 0 0 0 1
footprint=0603
}
N 52000 42400 52000 43600 4
C 47200 43800 1 0 0 inductor-1.sym
{
T 47400 44300 5 10 0 0 0 0 1
device=INDUCTOR
T 47100 44000 5 8 1 1 0 0 1
refdes=L3
T 47400 44500 5 10 0 0 0 0 1
symversion=0.1
T 48000 44000 5 8 1 1 0 0 1
value=?
T 47200 43800 5 10 0 0 0 0 1
footprint=0603
}
C 52400 43500 1 0 1 SMA.sym
{
T 52400 44300 5 10 0 0 0 6 1
device=SMA
T 51900 44200 5 8 1 1 0 1 1
refdes=J3
T 52400 44700 5 10 0 0 0 6 1
footprint=SMA-RATH
}
C 43100 42300 1 0 0 resistor-1.sym
{
T 43400 42700 5 10 0 0 0 0 1
device=RESISTOR
T 43000 42500 5 10 1 1 0 0 1
refdes=R11
T 43900 42500 5 10 1 1 0 0 1
value=0
T 43100 42300 5 10 0 0 0 0 1
footprint=0603
}
N 44000 42400 52000 42400 4
N 43100 42400 42500 42400 4
N 42500 42400 42500 42000 4
C 40200 39400 1 0 0 generic-supply-1.sym
{
T 40400 39650 5 10 0 1 0 3 1
net=DVdd:1
T 40600 40500 5 10 0 0 0 0 1
footprint=none
T 40600 40300 5 10 0 0 0 0 1
device=PWR
T 40400 39700 9 10 1 1 0 4 1
netname=DVdd
}
C 51200 52600 1 0 0 generic-supply-1.sym
{
T 51400 52850 5 10 0 1 0 3 1
net=DVdd:1
T 51600 53700 5 10 0 0 0 0 1
footprint=none
T 51600 53500 5 10 0 0 0 0 1
device=PWR
T 51400 52900 9 10 1 1 0 4 1
netname=DVdd
}
C 48100 50700 1 0 0 generic-supply-1.sym
{
T 48300 50950 5 10 0 1 0 3 1
net=DVdd:1
T 48500 51800 5 10 0 0 0 0 1
footprint=none
T 48500 51600 5 10 0 0 0 0 1
device=PWR
T 48300 51000 9 10 1 1 0 4 1
netname=DVdd
}
C 52500 46200 1 0 0 agnd.sym
C 42400 41700 1 0 0 agnd.sym
C 41800 37400 1 0 0 agnd.sym
C 55000 49600 1 0 0 agnd.sym
N 40400 39200 40900 39200 4
N 40900 39200 40900 39000 4
N 40900 38100 40900 37900 4
N 40900 37900 40400 37900 4
N 41900 39200 42400 39200 4
N 42400 39200 42400 39000 4
N 42400 38100 42400 37900 4
N 42400 37900 41900 37900 4
C 40700 39000 1 270 0 capacitor-polarized.sym
{
T 40800 38100 5 8 1 1 90 1 1
refdes=C25
T 41500 38800 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 40800 38700 5 8 1 1 90 1 1
value=10uF
T 40700 39000 5 10 0 0 0 0 1
footprint=EIA3216
}
C 42200 39000 1 270 0 capacitor-polarized.sym
{
T 42300 38100 5 8 1 1 90 1 1
refdes=C26
T 43000 38800 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 42300 38700 5 8 1 1 90 1 1
value=10uF
T 42200 39000 5 10 0 0 0 0 1
footprint=EIA3216
}
C 51500 46600 1 0 0 resistor-1.sym
{
T 51800 47000 5 10 0 0 0 0 1
device=RESISTOR
T 51300 46800 5 8 1 1 0 1 1
refdes=R12
T 52300 46800 5 8 1 1 0 1 1
value=0
T 51500 46600 5 10 0 0 270 0 1
footprint=0603
}
N 52400 46700 52600 46700 4
N 51500 46700 51200 46700 4
T 40100 39900 9 10 1 0 0 0 1
AD9834
T 41600 39900 9 10 1 0 0 0 1
AD9834
T 52000 37800 9 14 1 0 0 0 1
DDS and LPF
T 52100 37100 9 14 1 0 0 0 1
2
T 55800 37100 9 10 1 0 0 0 1
Jean Richard
T 55800 37400 9 10 1 0 0 0 1
v1.0
T 53800 37100 9 14 1 0 0 0 1
3
C 44700 50600 1 0 0 oscillator.sym
{
T 45000 51800 5 10 1 1 0 0 1
refdes=X1
T 45000 52100 5 10 0 0 0 0 1
device=CRYSTAL_OSCILLATOR
T 45000 52700 5 10 0 0 0 0 1
footprint=FXOHC53_50x35
T 45900 51800 5 10 1 1 0 0 1
value=FXO-HC53 (75MHz)
}
N 44700 51300 44500 51300 4
N 44500 51300 44500 52200 4
N 45700 50600 45700 50300 4
N 45700 52000 45700 52400 4
C 45500 52400 1 0 0 generic-supply-1.sym
{
T 45700 52650 5 10 0 1 0 3 1
net=DVdd:1
T 45900 53500 5 10 0 0 0 0 1
footprint=none
T 45900 53300 5 10 0 0 0 0 1
device=PWR
T 45700 52700 9 10 1 1 0 4 1
netname=DVdd
}
C 45600 50000 1 0 0 gnd-1.sym
N 44500 52200 45700 52200 4
C 38300 38200 1 90 0 capacitor-1.sym
{
T 37600 38400 5 10 0 0 90 0 1
device=CAPACITOR
T 38000 38200 5 8 1 1 90 0 1
refdes=C27
T 37400 38400 5 10 0 0 90 0 1
symversion=0.1
T 38000 38800 5 8 1 1 90 0 1
value=0.1uF
T 38300 38200 5 10 0 0 0 0 1
footprint=0603
}
C 37900 39400 1 0 0 generic-supply-1.sym
{
T 38100 39650 5 10 0 1 0 3 1
net=DVdd:1
T 38300 40500 5 10 0 0 0 0 1
footprint=none
T 38300 40300 5 10 0 0 0 0 1
device=PWR
T 38100 39700 9 10 1 1 0 4 1
netname=DVdd
}
C 38000 37400 1 0 0 gnd-1.sym
N 38100 39400 38100 39100 4
N 38100 38200 38100 37700 4
T 37800 39900 9 10 1 0 0 0 1
Oscillator
N 46700 51300 50200 51300 4
C 39400 38200 1 90 0 capacitor-1.sym
{
T 38700 38400 5 10 0 0 90 0 1
device=CAPACITOR
T 39100 38200 5 8 1 1 90 0 1
refdes=C28
T 38500 38400 5 10 0 0 90 0 1
symversion=0.1
T 39100 38800 5 8 1 1 90 0 1
value=0.1uF
T 39400 38200 5 10 0 0 0 0 1
footprint=0603
}
C 39000 39400 1 0 0 generic-supply-1.sym
{
T 39200 39650 5 10 0 1 0 3 1
net=DVdd:1
T 39400 40500 5 10 0 0 0 0 1
footprint=none
T 39400 40300 5 10 0 0 0 0 1
device=PWR
T 39200 39700 9 10 1 1 0 4 1
netname=DVdd
}
C 39100 37400 1 0 0 gnd-1.sym
N 39200 39400 39200 39100 4
N 39200 38200 39200 37700 4
T 38900 39900 9 10 1 0 0 0 1
Clock PLL