arch-arm: Make interrupt masking handle VHE/SEL2 cases #430
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We pay a small duplication cost but we make the code more readable and we enable further modifications to the AArch64 code without forcing the same code on the AArch32 method Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: I1efa33cf19f91094fd33bd48b6a0a57d8df8f89f
The new implementation matches the table in the ARM Architecture Reference Manual (version DDI 0487J.a, section D1.3.6, table R_SXLWJ) It takes into consideration features like FEAT_SEL2 (scr.eel2 bit) and FEAT_VHE (hcr.e2h bit) which affect the masking of interrupts under certain circumstances Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: I07ebd8d859651475bd32fd201eea0f4e64a7dd5f
andysan
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Oct 10, 2023
giactra
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Similarly to the physical version [1], we rewrite the masking logic to account for FEAT_SEL2. The interrupt table is taken from the Arm architecture reference manual (version DDI 0487H.a, section D1.3.6, table R_BKHXL) [1]: gem5#430 Change-Id: Icb6eb1944d8241293b3ef3c349b20f3981bcc558 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
aarmejach
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Nov 27, 2023
Similarly to the physical version [1], we rewrite the masking logic to account for FEAT_SEL2. The interrupt table is taken from the Arm architecture reference manual (version DDI 0487H.a, section D1.3.6, table R_BKHXL) [1]: gem5#430 Change-Id: Icb6eb1944d8241293b3ef3c349b20f3981bcc558 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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The new implementation matches the table in the ARM Architecture
Reference Manual (version DDI 0487J.a, section D1.3.6, table R_SXLWJ)
It takes into consideration features like FEAT_SEL2 (scr.eel2 bit) and
FEAT_VHE (hcr.e2h bit) which affect the masking of interrupts under
certain circumstances