cmd/compile: use NEG/NEGW pseudo-instructions on riscv64

Also rewrite subtraction of zero to NEG/NEGW.

Change-Id: I216e286d1860055f2a07fe2f772cd50f366ea097
Reviewed-on: https://go-review.googlesource.com/c/go/+/221691
Reviewed-by: Cherry Zhang <cherryyz@google.com>

src/cmd/compile/internal/riscv64/ssa.go

@@ -251,7 +251,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
 		ssa.OpRISCV64FMVSX, ssa.OpRISCV64FMVDX,
 		ssa.OpRISCV64FCVTSW, ssa.OpRISCV64FCVTSL, ssa.OpRISCV64FCVTWS, ssa.OpRISCV64FCVTLS,
 		ssa.OpRISCV64FCVTDW, ssa.OpRISCV64FCVTDL, ssa.OpRISCV64FCVTWD, ssa.OpRISCV64FCVTLD, ssa.OpRISCV64FCVTDS, ssa.OpRISCV64FCVTSD,
-		ssa.OpRISCV64NOT:
+		ssa.OpRISCV64NOT, ssa.OpRISCV64NEG, ssa.OpRISCV64NEGW:
 		p := s.Prog(v.Op.Asm())
 		p.From.Type = obj.TYPE_REG
 		p.From.Reg = v.Args[0].Reg()

src/cmd/compile/internal/ssa/gen/RISCV64.rules

@@ -84,10 +84,10 @@
 (Xor16 ...) -> (XOR ...)
 (Xor8  ...) -> (XOR ...)
 
-(Neg64 x) -> (SUB (MOVDconst) x)
-(Neg32 x) -> (SUB (MOVWconst) x)
-(Neg16 x) -> (SUB (MOVHconst) x)
-(Neg8  x) -> (SUB (MOVBconst) x)
+(Neg64  ...) -> (NEG ...)
+(Neg32  ...) -> (NEG ...)
+(Neg16  ...) -> (NEG ...)
+(Neg8   ...) -> (NEG ...)
 (Neg32F ...) -> (FNEGS ...)
 (Neg64F ...) -> (FNEGD ...)
 
@@ -497,5 +497,14 @@
 // Subtraction of zero with sign extension.
 (SUBW x (MOVWconst [0])) -> (ADDIW [0] x)
 
+// Subtraction from zero.
+(SUB (MOVBconst [0]) x) -> (NEG x)
+(SUB (MOVHconst [0]) x) -> (NEG x)
+(SUB (MOVWconst [0]) x) -> (NEG x)
+(SUB (MOVDconst [0]) x) -> (NEG x)
+
+// Subtraction from zero with sign extension.
+(SUBW (MOVDconst [0]) x) -> (NEGW x)
+
 // remove redundant *const ops
 (ADDI [0]  x) -> x

src/cmd/compile/internal/ssa/gen/RISCV64Ops.go

@@ -131,6 +131,8 @@ func init() {
 		{name: "ADD", argLength: 2, reg: gp21, asm: "ADD", commutative: true}, // arg0 + arg1
 		{name: "ADDI", argLength: 1, reg: gp11sb, asm: "ADDI", aux: "Int64"},  // arg0 + auxint
 		{name: "ADDIW", argLength: 1, reg: gp11, asm: "ADDIW", aux: "Int64"},  // 32 low bits of arg0 + auxint, sign extended to 64 bits
+		{name: "NEG", argLength: 1, reg: gp11, asm: "NEG"},                    // -arg0
+		{name: "NEGW", argLength: 1, reg: gp11, asm: "NEGW"},                  // -arg0 of 32 bits, sign extended to 64 bits
 		{name: "SUB", argLength: 2, reg: gp21, asm: "SUB"},                    // arg0 - arg1
 		{name: "SUBW", argLength: 2, reg: gp21, asm: "SUBW"},                  // 32 low bits of arg 0 - 32 low bits of arg 1, sign extended to 64 bits